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2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)最新文献

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A 105GHz VCO with 9.5% tuning range and 2.8mW peak output power using coupled colpitts oscillators in 65nm bulk CMOS 105GHz压控振荡器，调节范围为9.5%，峰值输出功率为2.8mW
2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2013-06-02 DOI: 10.1109/RFIC.2013.6569571
M. Adnan, E. Afshari
{"title":"A 105GHz VCO with 9.5% tuning range and 2.8mW peak output power using coupled colpitts oscillators in 65nm bulk CMOS","authors":"M. Adnan, E. Afshari","doi":"10.1109/RFIC.2013.6569571","DOIUrl":"https://doi.org/10.1109/RFIC.2013.6569571","url":null,"abstract":"In this work, a loop of unidirectionally coupled oscillators to demonstrate high tuning range and output power is proposed. To achieve large tuning range, two different tuning mechanisms are simultaneously exploited. First each core oscillator is tuned using a variable capacitor. Next, by controlling the phase/delay between the coupled oscillators, the entire loop dynamics and hence its frequency is tuned. In this paper, we analyze a loop of “n” coupled oscillators using Adler's equation and derive the expression for the maximum tuning range. The proposed system is designed and implemented using four coupled Colpitts VCOs in a 65nm bulk CMOS process. The VCO achieves continuous tuning range of 9.5% at the center frequency of 105GHz with the peak output power of 2.8mW. The circuit consumes 54mW from a 1.2V supply. To the best of our knowledge, this VCO has the highest output power and tuning range among all the CMOS oscillators at or above 100GHz.","PeriodicalId":203521,"journal":{"name":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130914845","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
A 36GHz/mw single-phase prescaler using implication logic in 0.13μm CMOS 一种基于0.13μm CMOS隐含逻辑的36GHz/mw单相预分频器
2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2013-06-02 DOI: 10.1109/RFIC.2013.6569624
E. Roa, Wu-Hsin Chen, B. Jung
{"title":"A 36GHz/mw single-phase prescaler using implication logic in 0.13μm CMOS","authors":"E. Roa, Wu-Hsin Chen, B. Jung","doi":"10.1109/RFIC.2013.6569624","DOIUrl":"https://doi.org/10.1109/RFIC.2013.6569624","url":null,"abstract":"This paper presents a non-Boolean digital logic technique used in the design of a high-speed and low-power frequency prescaler. Maximum achievable frequency input of prescalers is limited by the number of devices connected in cascade to the high-speed signal path. In this work, a reduced number of devices is obtained in the prescaler by realizing implication logic operators with a single-phase digital-based flip-flop. The prescaler is implemented in 0.13μm CMOS with a 1.2V supply. A measured efficiency of 36GHz per mW is achieved which represents 3X power consumption reduction compared to prior art in the same technology node, and the highest efficiency reported.","PeriodicalId":203521,"journal":{"name":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132774398","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A WLAN RF CMOS PA with adaptive power cells 具有自适应动力电池的WLAN RF CMOS PA
2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2013-06-02 DOI: 10.1109/RFIC.2013.6569600
T. Joo, Bonhoon Koo, Songcheol Hong
{"title":"A WLAN RF CMOS PA with adaptive power cells","authors":"T. Joo, Bonhoon Koo, Songcheol Hong","doi":"10.1109/RFIC.2013.6569600","DOIUrl":"https://doi.org/10.1109/RFIC.2013.6569600","url":null,"abstract":"A CMOS linear PA for IEEE 802.11 b/g applications is implemented in a 0.13 μm process including all matching networks. An adaptive power cell (APC) scheme is proposed to achieve high linear output power and efficiency and applied to the PA, which delivers the output power of 20.5 (19.5) dBm with the PAE of 20.2(17.5)% for an 802.11g modulated signal with the EVMs at -25(-28) dB.","PeriodicalId":203521,"journal":{"name":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130995196","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
A low power miniaturized 1.95mm2 fully integrated transceiver with fastPLL mode for IEEE 802.15.4/bluetooth smart and proprietary 2.4GHz applications 低功耗小型化1.95mm2全集成收发器，采用fastPLL模式，适用于IEEE 802.15.4/蓝牙智能和专有的2.4GHz应用
2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2013-06-02 DOI: 10.1109/RFIC.2013.6569525
F. Pengg, D. Barras, M. Kucera, N. Scolari, A. Vouilloz
{"title":"A low power miniaturized 1.95mm2 fully integrated transceiver with fastPLL mode for IEEE 802.15.4/bluetooth smart and proprietary 2.4GHz applications","authors":"F. Pengg, D. Barras, M. Kucera, N. Scolari, A. Vouilloz","doi":"10.1109/RFIC.2013.6569525","DOIUrl":"https://doi.org/10.1109/RFIC.2013.6569525","url":null,"abstract":"This paper presents an ultra-low power miniaturized single chip transceiver operating in the ISM band at 2.4GHz. Targeting low power and minimum die size, while excluding RF-options and minimizing the count of external components for low-cost, asks for appropriate architectural choices to obtain high performance. Fast PLL locking and immediate RX-TX turn-around minimize the consumption overhead at wake-up and turn-around. With a die size of only 1.95mm2 in a 90nm standard digital CMOS technology, the receiver achieves a sensitivity of -94.5dBm (1Mbps, BER 10E-3) while consuming only 7.1mA and the transmitter consumes 9.2mA for 0dBm output power. The base-band is compliant with the IEEE 802.15.4 standard, the Bluetooth Smart standard (former Bluetooth low energy BLE) and can be configured for proprietary standards at 2.4GHz, with data-rates up to 3Mbps.","PeriodicalId":203521,"journal":{"name":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133625070","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
A 1.9nJ/bit, 5Mbps multi-standard ISM band wireless transmitter using fully digital PLL 1.9nJ/bit, 5Mbps多标准ISM波段无线发射机，采用全数字锁相环
2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2013-06-02 DOI: 10.1109/RFIC.2013.6569526
S. Chakraborty, V. Parikh, S. Sankaran, Tomás Motos, Indu Prathapan, K. Nagaraj, Frank Zhang, Oddgeir Fikstvedt, Ryan Smith, S. Sundar, D. Griffith, P. Cruise
{"title":"A 1.9nJ/bit, 5Mbps multi-standard ISM band wireless transmitter using fully digital PLL","authors":"S. Chakraborty, V. Parikh, S. Sankaran, Tomás Motos, Indu Prathapan, K. Nagaraj, Frank Zhang, Oddgeir Fikstvedt, Ryan Smith, S. Sundar, D. Griffith, P. Cruise","doi":"10.1109/RFIC.2013.6569526","DOIUrl":"https://doi.org/10.1109/RFIC.2013.6569526","url":null,"abstract":"This paper presents an energy efficient transmitter for multi-standard applications (IEEE802.15.4, BLE, 5Mbps) in ISM2.4GHz band. It incorporates a fully digital PLL with two point modulation to achieve upto 5Mbps data rate at 9.5mW power consumption (including all power management blocks) at 0dBm output power, leading to 1.9nJ/b efficiency. The proposed digital PLL uses a counter based area and power efficient re-circulating TDC, current reuse low area DCO using resistive tail, process compensated high speed divider, class-AB PA stages, and fully integrated on-chip LDOs. The entire transmitter occupies 0.35mm2 Silicon area in a 65nm digital CMOS process.","PeriodicalId":203521,"journal":{"name":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"2020 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129434586","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 0.5-to-3 GHz software-defined radio receiver using sample domain signal processing 采用采样域信号处理的0.5 ~ 3ghz软件无线电接收机
2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2013-06-02 DOI: 10.1109/RFIC.2013.6569592
Run Chen, H. Hashemi
{"title":"A 0.5-to-3 GHz software-defined radio receiver using sample domain signal processing","authors":"Run Chen, H. Hashemi","doi":"10.1109/RFIC.2013.6569592","DOIUrl":"https://doi.org/10.1109/RFIC.2013.6569592","url":null,"abstract":"A 0.5-to-3 GHz software-defined radio receiver leveraging Sampled Domain Signal Processing (SPSD) is demonstrated in a 65nm LP CMOS technology. The SDSP approach achieves band-pass filtering, harmonic rejection, and frequency translation simultaneously. Input impedance matching is achieved in an active translational loop that tracks the desired RF frequency. The chip includes a wideband frequency synthesizer, multi-phase nonoverlapping clock generation circuitry, bandgap and power supply regulators. It achieves out-of-band IIP3 > 11.7 dBm, IIP2 > 58 dBm, NF = 5.5 ~ 8.8 dB, and uncalibrated 3rd and 5th order harmonic rejections exceeding 47 dB and 52 dB, respectively.","PeriodicalId":203521,"journal":{"name":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131779084","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Electronic laser phase noise reduction 电子激光相位降噪
2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2013-06-02 DOI: 10.1109/RFIC.2013.6569578
F. Aflatouni, Behrooz Abiri, Angad S. Rekhi, H. Abediasl, H. Hashemi, A. Hajimiri
{"title":"Electronic laser phase noise reduction","authors":"F. Aflatouni, Behrooz Abiri, Angad S. Rekhi, H. Abediasl, H. Hashemi, A. Hajimiri","doi":"10.1109/RFIC.2013.6569578","DOIUrl":"https://doi.org/10.1109/RFIC.2013.6569578","url":null,"abstract":"The first integrated wideband laser phase noise reduction scheme is presented where the laser phase noise is first detected using a photonic chip, processed using an electronic chip, and subtracted from the laser phase in a feed-forward manner. The proof-of-concept experiments on a commercially available 1553nm distributed feedback laser show linewidth reduction from 6MHz to 250kHz equivalent to 14dB phase noise improvement. The hybrid integration of the photonic and electronic chips enables dramatic power consumption and area reduction compared to bench-top designs. This feed-forward scheme performs wideband phase noise reduction independent of the light source and, as such, it is compatible with several types of lasers.","PeriodicalId":203521,"journal":{"name":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132164567","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A wideband voltage-biased LC oscillator with reduced flicker noise up-conversion 具有降低闪烁噪声的上转换宽带电压偏置LC振荡器
2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2013-06-02 DOI: 10.1109/RFIC.2013.6569513
F. Pepe, A. Bonfanti, S. Levantino, C. Samori, A. Lacaita
{"title":"A wideband voltage-biased LC oscillator with reduced flicker noise up-conversion","authors":"F. Pepe, A. Bonfanti, S. Levantino, C. Samori, A. Lacaita","doi":"10.1109/RFIC.2013.6569513","DOIUrl":"https://doi.org/10.1109/RFIC.2013.6569513","url":null,"abstract":"The demand of voltage-controlled oscillators (VCOs) with a broad tuning range can lead to unacceptable degradation of the 1/f3 phase-noise component if traditional voltage-biased topologies are implemented. In this paper, a novel VCO architecture is proposed, where a segmented transconductor tailors the negative gm depending on the operating range to ensure that flicker-noise up-conversion remains minimal. The implemented oscillator covers both 4G and WiMAX 2.5-GHz operation modes and achieves a 10-dB reduction of the 1/f3 phase noise without impairing the 1/f2 phase-noise performance.","PeriodicalId":203521,"journal":{"name":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133265758","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A 60nm WiFi/BT/GPS/FM combo connectivity SOC with integrated power amplifiers, virtual SP3T switch, and merged WiFi-BT transceiver 60nm WiFi/BT/GPS/FM组合连接SOC，集成功率放大器，虚拟SP3T交换机和合并WiFi-BT收发器
2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2013-06-02 DOI: 10.1109/RFIC.2013.6569541
Chia-Hsin Wu, Tsung-Ming Chen, Wei-Kai Hong, Chih-Hsien Shen, Jui-Lin Hsu, Jen-Che Tsai, Kuo-Hao Chen, Yi-An Li, Sheng-Hao Chen, Chun-Hao Liao, Hung-Pin Ma, Hui-Hsien Liu, Min-Shun Hsu, Sheng-Yuan Su, A. Jerng, G. Chien
{"title":"A 60nm WiFi/BT/GPS/FM combo connectivity SOC with integrated power amplifiers, virtual SP3T switch, and merged WiFi-BT transceiver","authors":"Chia-Hsin Wu, Tsung-Ming Chen, Wei-Kai Hong, Chih-Hsien Shen, Jui-Lin Hsu, Jen-Che Tsai, Kuo-Hao Chen, Yi-An Li, Sheng-Hao Chen, Chun-Hao Liao, Hung-Pin Ma, Hui-Hsien Liu, Min-Shun Hsu, Sheng-Yuan Su, A. Jerng, G. Chien","doi":"10.1109/RFIC.2013.6569541","DOIUrl":"https://doi.org/10.1109/RFIC.2013.6569541","url":null,"abstract":"A highly integrated WiFi/BT/FM/GPS connectivity combo SOC is implemented in a 60nm CMOS process. This work presents the proposed WiFi/BT merged RF transceiver, a virtual SP3T switch, and DPD algorithm to save chip area, reduce BOM and enhance performance simultaneously. The WiFi/BT/FM/GPS RF transceiver areas are 1.7/1.3/0.8/1.0mm2, respectively. The measured WiFi 11g 54Mbps RX sensitivity is -78dBm and Pout is 20dBm with EVM of -28dB. The measured BT GMSK RX sensitivity is -94dBm and Pout is 10dBm. FM sensitivity is -110dBm and GPS cold/hot-start TTFF sensitivity is -148/-163dBm.","PeriodicalId":203521,"journal":{"name":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133341761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
A self-steering I/Q receiver array in 45-nm CMOS SOI 一种45纳米CMOS SOI自导向I/Q接收器阵列
2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2013-06-02 DOI: 10.1109/RFIC.2013.6569606
Arpit K. Gupta, J. Buckwalter
{"title":"A self-steering I/Q receiver array in 45-nm CMOS SOI","authors":"Arpit K. Gupta, J. Buckwalter","doi":"10.1109/RFIC.2013.6569606","DOIUrl":"https://doi.org/10.1109/RFIC.2013.6569606","url":null,"abstract":"A novel I/Q receiver array is demonstrated that adapts phase shifts in each receive channel to point a receive beam toward an incident RF signal. The measured array operates at 8.1 GHz and covers steering angles of +/-35 degrees for a four element array. Additionally, the receiver incorporates an I/Q down-converter and demodulates 64QAM with EVM less than 4%. The chip is fabricated in 45 nm CMOS SOI process and occupies an area of 3.45 mm2 while consuming 143 mW dc power.","PeriodicalId":203521,"journal":{"name":"2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121731798","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
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