1.9nJ/bit, 5Mbps多标准ISM波段无线发射机,采用全数字锁相环

S. Chakraborty, V. Parikh, S. Sankaran, Tomás Motos, Indu Prathapan, K. Nagaraj, Frank Zhang, Oddgeir Fikstvedt, Ryan Smith, S. Sundar, D. Griffith, P. Cruise
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引用次数: 4

摘要

本文提出了一种适用于ISM2.4GHz频段多标准应用(IEEE802.15.4, BLE, 5Mbps)的节能发射机。它集成了一个带两点调制的全数字锁相环,在0dBm输出功率下,以9.5mW的功耗(包括所有电源管理模块)实现高达5Mbps的数据速率,从而实现1.9nJ/b的效率。所提出的数字锁相环采用基于计数器的面积和功率高效的再循环TDC,电流重用低面积DCO采用电阻尾,过程补偿高速分压器,ab级PA级和完全集成的片上ldo。整个发射机在65nm数字CMOS工艺中占据0.35mm2的硅面积。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 1.9nJ/bit, 5Mbps multi-standard ISM band wireless transmitter using fully digital PLL
This paper presents an energy efficient transmitter for multi-standard applications (IEEE802.15.4, BLE, 5Mbps) in ISM2.4GHz band. It incorporates a fully digital PLL with two point modulation to achieve upto 5Mbps data rate at 9.5mW power consumption (including all power management blocks) at 0dBm output power, leading to 1.9nJ/b efficiency. The proposed digital PLL uses a counter based area and power efficient re-circulating TDC, current reuse low area DCO using resistive tail, process compensated high speed divider, class-AB PA stages, and fully integrated on-chip LDOs. The entire transmitter occupies 0.35mm2 Silicon area in a 65nm digital CMOS process.
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