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A Remote Design Station for Customer Uncommitted Logic Array Designs 客户未提交逻辑阵列设计的远程设计工作站
18th Design Automation Conference Pub Date : 1981-06-29 DOI: 10.1109/DAC.1981.1585402
F. Ramsay
{"title":"A Remote Design Station for Customer Uncommitted Logic Array Designs","authors":"F. Ramsay","doi":"10.1109/DAC.1981.1585402","DOIUrl":"https://doi.org/10.1109/DAC.1981.1585402","url":null,"abstract":"The paper describes a low cost remote design station that can be installed in customers offices, giving them the full C.A.D. facilities required to specify, design and verify an Uncommitted Logic Array. The designers can enter and check their logic, layouts and test programs via this remote station. Access is then available, via modem links, to the main Ferranti C.A.D. facility for running of design verification programs etc. The need for such a system came after many years experience in handling customer designed circuits.","PeriodicalId":201443,"journal":{"name":"18th Design Automation Conference","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1981-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122259245","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Automatic/Interactive Layout Planning System for Arbitrarily-Sized Rectangular Building Blocks 用于任意大小矩形建筑块的自动/交互布局规划系统
18th Design Automation Conference Pub Date : 1981-06-29 DOI: 10.1109/DAC.1981.1585366
C. Horng, Margaret Lie
{"title":"An Automatic/Interactive Layout Planning System for Arbitrarily-Sized Rectangular Building Blocks","authors":"C. Horng, Margaret Lie","doi":"10.1109/DAC.1981.1585366","DOIUrl":"https://doi.org/10.1109/DAC.1981.1585366","url":null,"abstract":"Layout Planning Aids (LPA) is designed to allow easy generation of topological layout (chip) plans for IC mask designs. The output of LPA is a hard-copy topological plan. The system encourages a hierarchical design style. It encompasses both algorithmic and computer-assisted, designer-controlled approaches to the problem by providing automatic placement and routing facilities plus a set of versatile interactive commands. The interactive features allow designers to work collaboratively with the system such that the strengths of both can be combined to achieve the best results.","PeriodicalId":201443,"journal":{"name":"18th Design Automation Conference","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1981-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115868325","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
The Cell Design System 细胞设计系统
18th Design Automation Conference Pub Date : 1981-06-29 DOI: 10.1109/DAC.1981.1585358
D. Franco, L. Reed
{"title":"The Cell Design System","authors":"D. Franco, L. Reed","doi":"10.1109/DAC.1981.1585358","DOIUrl":"https://doi.org/10.1109/DAC.1981.1585358","url":null,"abstract":"The Cell Design System (CDS) is part of a set of tools developed in the 1970s by the Electronics Division of Xerox to support CAD design. This paper describes the CDS, which is a highly interactive graphics system used for layout of custom chips. Described are the hardware environment and language, the kinds of manipulation allowed, types of objects, and viewing options. The CDS benefitted from experience with Icarus [1] which is an early research effort for cell design layout. As with Icarus, a strong benefit of the CDS is its availability on a personal computer, thus providing a layout capability within the office confines of the designer. Also, we feel that the CDS has provided a unique and powerful method of viewing cells and has a highly effective human interface.","PeriodicalId":201443,"journal":{"name":"18th Design Automation Conference","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1981-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134234810","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Digital System Simulation: Current Status and Future Trends or Darwin's Theory of Simulation 数字系统仿真:达尔文仿真理论的现状与未来趋势
18th Design Automation Conference Pub Date : 1981-06-29 DOI: 10.1109/DAC.1981.1585362
M. Breuer, A. C. Parker
{"title":"Digital System Simulation: Current Status and Future Trends or Darwin's Theory of Simulation","authors":"M. Breuer, A. C. Parker","doi":"10.1109/DAC.1981.1585362","DOIUrl":"https://doi.org/10.1109/DAC.1981.1585362","url":null,"abstract":"This paper presents a philosophical view of the changing field of design verification. The evolution of simulation and fault simulation are briefly summarized. Current research issues in design verification are discussed. The paper concludes with a discussion of the future direction simulation will take, along with other techniques destined to compete with simulation for the design verification task.","PeriodicalId":201443,"journal":{"name":"18th Design Automation Conference","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1981-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131607918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
A Multiprocessor Raster Display for Interactive Graphics System Design 一种用于交互图形系统设计的多处理器光栅显示器
18th Design Automation Conference Pub Date : 1981-06-29 DOI: 10.1109/DAC.1981.1585401
W. Anderson
{"title":"A Multiprocessor Raster Display for Interactive Graphics System Design","authors":"W. Anderson","doi":"10.1109/DAC.1981.1585401","DOIUrl":"https://doi.org/10.1109/DAC.1981.1585401","url":null,"abstract":"The design of increasingly complex VLSI circuits and multilayer printed circuit boards have increased the demands on computer aided design methods including interactive graphics systems. Earlier minicomputer based systems with direct view storage tube displays lack the processing power and display characteristics that allow high degrees of interactivity and visual discrimination required for high productivity in complex design situations. Declining semiconductor RAM costs and increasing capabilities of microprocessors have allowed raster display technology to keep pace with the demands of current interactive graphics systems.\u0000 The recently introduced Lexidata Graphics System 8000 combines state of the art color and black and white raster display technology with the latest microprocessor technology to provide a powerful element for the design of interactive graphics systems to meet today's greater needs. The GS8000 includes a very fast Schottky display processor to convert vectors to raster and fill areas and a 16 bit microprocessor to service interactive devices and process a world coordinate data base for editing and display. The system hardware off loads a significant processing and memory burden from the host computer allowing the use of a less powerful host or more users on a single host. An extensive software library resident in the Graphics System 8000 reduces the software development required of the user allowing him to concentrate on the applications software necessary for the creation, maintenance and non-graphic processing of his design data base on his host computer.","PeriodicalId":201443,"journal":{"name":"18th Design Automation Conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1981-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131264258","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimization of the PLA Area 解放军区域的优化
18th Design Automation Conference Pub Date : 1981-06-29 DOI: 10.1109/DAC.1981.1585388
J.-F. Paillotin
{"title":"Optimization of the PLA Area","authors":"J.-F. Paillotin","doi":"10.1109/DAC.1981.1585388","DOIUrl":"https://doi.org/10.1109/DAC.1981.1585388","url":null,"abstract":"A method to reduce the area of the PLA's is presented. Two steps are considered : the permutation of the minterms (columns) and the compacting of the PLA. The method is illustrated on the NMOS technology.","PeriodicalId":201443,"journal":{"name":"18th Design Automation Conference","volume":"97 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1981-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115438696","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
A CODASYL CAD Data Base System 一个CODASYL CAD数据库系统
18th Design Automation Conference Pub Date : 1981-06-29 DOI: 10.1109/DAC.1981.1585414
G. Zintl
{"title":"A CODASYL CAD Data Base System","authors":"G. Zintl","doi":"10.1109/DAC.1981.1585414","DOIUrl":"https://doi.org/10.1109/DAC.1981.1585414","url":null,"abstract":"If in CAD systems a CODASYL data base system is used, one has to avoid some well known disadvantages. To achieve this, we defined for CAD needs in application programs a special high level data manipulation language (HLDML). With this concept the application programs get independent from the data base structure and they are able to work with a \"many records at a time\"-view. Other provisions reduced some overhead caused by the used data base system.","PeriodicalId":201443,"journal":{"name":"18th Design Automation Conference","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1981-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114861921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Efficient Boolean Operations on IC Masks 对IC掩码的高效布尔运算
18th Design Automation Conference Pub Date : 1981-06-29 DOI: 10.1109/DAC.1981.1585412
James A. Wilmore
{"title":"Efficient Boolean Operations on IC Masks","authors":"James A. Wilmore","doi":"10.1109/DAC.1981.1585412","DOIUrl":"https://doi.org/10.1109/DAC.1981.1585412","url":null,"abstract":"Circuit extraction and design rule checking programs make extensive use of Boolean operations which accept IC mask data as operands. A wide variety of computer algorithms have been written that implement Boolean operations on sets of geometric entities. These algorithms vary in their efficiency and can be characterized by how they represent, sort, and compare IC artwork files. A bit-map representation of IC layout data precisely localizes mask information and eliminates the need for sorting the layout data prior to or during the performance of Boolean operations. The bit patterns of the mask operands may be compared using the CPU's own Boolean operators. A compacted bit-map format that can represent IC layouts concisely, therefore, provides an excellent data base for a very efficient algorithm to perform geometric Boolean operations.","PeriodicalId":201443,"journal":{"name":"18th Design Automation Conference","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1981-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114933512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Data Structures for CAD Object Description CAD对象描述的数据结构
18th Design Automation Conference Pub Date : 1981-06-29 DOI: 10.1109/DAC.1981.1585423
M. Lacroix, A. Pirotte
{"title":"Data Structures for CAD Object Description","authors":"M. Lacroix, A. Pirotte","doi":"10.1109/DAC.1981.1585423","DOIUrl":"https://doi.org/10.1109/DAC.1981.1585423","url":null,"abstract":"Designing databases allowing the inter-application communication of designs in integrated CAD systems is a very complex task. A way of breaking this complexity consists in clearly separating the logical and physical concerns in database design. A data model well-suited to the logical description of elaborate objects such as those handled in CAD in electronics is presented. It is argued to be more adapted to the CAD needs than the hierarchic, network and relational data models.","PeriodicalId":201443,"journal":{"name":"18th Design Automation Conference","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1981-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116424875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
A State-Machine Synthesizer -- SMS 状态机合成器——SMS
18th Design Automation Conference Pub Date : 1981-06-29 DOI: 10.1109/DAC.1981.1585367
Douglas W. Brown
{"title":"A State-Machine Synthesizer -- SMS","authors":"Douglas W. Brown","doi":"10.1109/DAC.1981.1585367","DOIUrl":"https://doi.org/10.1109/DAC.1981.1585367","url":null,"abstract":"Much of the work in implementing a state machine involves tedious calculations that require no creativity. This report describes the development of a digital-circuit synthesis program that helps reduce the tedium. SMS accepts a high-level description of a state machine and returns equations for implementation that assume a sum-of-products next-state and output functions and that also assume JK or D flip-flops for memory.","PeriodicalId":201443,"journal":{"name":"18th Design Automation Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1981-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128214923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 61
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