Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems最新文献_第2页

Fault-based side-channel cryptanalysis tolerant Rijndael symmetric block cipher architecture 基于故障的侧信道密码分析容错Rijndael对称分组密码结构

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966796

R. Karri, Kaijie Wu, P. Mishra, Yongkook Kim

引用次数: 114

Error detection of arithmetic circuits using a residue checker with signed-digit number system 带符号数字系统的算术电路的误差检测

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966754

Shugang Wei, K. Shimizu

引用次数: 5

Development of the special software tools for the defect/fault analysis in the complex gates from standard cell library 基于标准单元库的复杂栅极缺陷/故障分析专用软件工具的开发

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966791

M. Blyzniuk, I. Kazymyra

引用次数: 6

Design of a totally self checking signature analysis checker for finite state machines 有限状态机完全自检签名分析检查器的设计

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966794

M. Ottavi, G. Cardarilli, D. Cellitti, S. Pontarelli, M. Re, A. Salsano

引用次数: 3

A software methodology for detecting hardware faults in VLIW data paths 一种检测VLIW数据路径中硬件故障的软件方法

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966766

C. Bolchini

引用次数: 74

Idle cycles based concurrent error detection of RC6 encryption, [FPGAs] 基于空闲周期的RC6加密并发错误检测，[fpga]

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966771

Kaijie Wu, R. Karri

引用次数: 14

CMOS standard cells characterization for defect based testing 基于缺陷测试的CMOS标准电池特性

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966792

W. Pleskacz, D. Kasprowicz, Tomasz Oleszczak, W. Kuzmicz

引用次数: 31

On-line error detectable carry-free adder design 在线误差检测无携带加法器设计

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966753

P. Lala, A. Walker

引用次数: 17

Embedded core testing using broadcast test architecture 使用广播测试架构进行嵌入式核心测试

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966757

J. H. Jiang, Shih-Chieh Chang, W. Jone

引用次数: 0

Challenges facing practical DFT for MEMS MEMS应用DFT面临的挑战

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966747

S. Tewksbury

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引用次数: 14