15th International Conference on Advanced Computing and Communications (ADCOM 2007)最新文献

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Tutorial 1: Utility-Oriented Grid Computing and the Gridbus Middleware 教程1:面向实用的网格计算和网格总线中间件
R. Buyya
{"title":"Tutorial 1: Utility-Oriented Grid Computing and the Gridbus Middleware","authors":"R. Buyya","doi":"10.1109/ADCOM.2007.7","DOIUrl":"https://doi.org/10.1109/ADCOM.2007.7","url":null,"abstract":"Grid computing, one of the latest buzzwords in the ICT industry, is emerging as a new paradigm for Internet-based parallel and distributing computing. It enables the sharing, selection, and aggregation of geographically distributed autonomous resources, such as computers (PCs, servers, clusters, supercomputers), databases, and scientific instruments, for solving large-scale problems in science, engineering, and commerce. It leverages existing IT infrastructure to optimize compute resources and manage data and computing workloads. The developers of Grids and Grid applications need to address numerous challenges: security, heterogeneity, dynamicity, scalability, reliability, service creation and pricing, resource discovery, resource management, application dAbsecomposition and service composition, and qualify of services. A number of projects around the world are developing technologies that help address one or more of these challenges. To address some of these challenges, the Gridbus Project at the University of Melbourne has developed grid middleware technologies that (1) enable the creation of Utility Grids, which provide economic incentive for Grid service providers for sharing resources; and (2) support rapid development and optimal deployment of eScience and eBusiness applications on enterprise and global Grids. The components of Gridbus middleware are: Grid application development environment for rapid creation of distributed applications, Grid service broker and application scheduler, Grid workflow management engine, SLA (service-level agreements) based Scheduler for clusters, Web-services based Grid market directory (GMD), Grid accounting services, Gridscape for creation of dynamic and interactive resource monitoring portals, Portlets for creation of Grid portals that support web-based management of Grid applications execution, and GridSim toolkit for performance evaluation. In addition, Gridbus also includes a widely used .NET-based enterprise Grid technology and Grid web services framework to support the integration of both Windows and Unix-class resources for Grid computing.","PeriodicalId":185608,"journal":{"name":"15th International Conference on Advanced Computing and Communications (ADCOM 2007)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123766667","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Transformation of Speaker Characteristics in Speech Using Support Vector Machines 基于支持向量机的语音说话人特征变换
K.S. Rao, S. Koolagudi
{"title":"Transformation of Speaker Characteristics in Speech Using Support Vector Machines","authors":"K.S. Rao, S. Koolagudi","doi":"10.1109/ADCOM.2007.124","DOIUrl":"https://doi.org/10.1109/ADCOM.2007.124","url":null,"abstract":"In this paper we propose support vector machines (S VM) for transforming the speaker characteristics of the speech. Speaker characteristics are mainly influenced by the behavioural characteristics (prosody) of the speaker, characteristics of the vocal tract system and the excitation source. In this work speaker transformation indicates, modifying the speaker characteristics of the speech according to the desired speaker, and preserving the underlying message (sequence of sound units, i.e., text) same as in the original speech. This is performed by deriving the mapping functions for transforming the vocal tract characteristics and prosodic characteristics. SVMs are explored for deriving these mapping functions. The prosodic parameters and the characteristics of the vocal tract system and the excitation source of the target speaker are obtained from the output of the mapping functions. The manipulations of the prosodic parameters (durational characteristics, pitch contour (intonation pattern) and intensity patterns) are achieved by manipulating the linear prediction (LP) residual with the help of the knowledge of the instants of significant excitation. The modified LP residual is used to excite the time varying filter. The filter parameters are updated according to the desired vocal tract characteristics. The target speaker's speech is synthesized and evaluated using listening tests. The results of the listening tests indicate that the proposed mapping functions using SVMs provide the better speaker transformation compared to the earlier methods proposed by the author.","PeriodicalId":185608,"journal":{"name":"15th International Conference on Advanced Computing and Communications (ADCOM 2007)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114537157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Auditory-Based Wavelet Packet Filterbank for Speech Recognition Using Neural Network 基于听觉的神经网络语音识别小波包滤波组
R. Gandhiraj, P. S. Sathidevi
{"title":"Auditory-Based Wavelet Packet Filterbank for Speech Recognition Using Neural Network","authors":"R. Gandhiraj, P. S. Sathidevi","doi":"10.1109/ADCOM.2007.47","DOIUrl":"https://doi.org/10.1109/ADCOM.2007.47","url":null,"abstract":"A major problem of most speech recognition systems is their unsatisfactory robustness in noise. Human inner ear based `feature extraction' leads to very robust speech understanding in noise. This `Model of Auditory Periphery' is acting as front-end model of this speech recognition process. This paper describes two quantitative models for signal processing in auditory system (i) Gamma Tone Filter Bank (GTFB) and (ii) Wavelet Packet (WP) as front- ends for robust speech recognition. The auditory feature vectors had been used to train neural network. The classification of the feature vectors was done by the neural network using Back Propagation (BP) algorithm. The system performance was measured by recognition rate with various signal-to- noise ratios over -10 to 10 dB. The proposed system's performance was compared with various types of front-ends and recognition methods such as auditory features with Hidden Markov Model (HMM) & Layered Neural Network (LRNN), auditory features with Mel Frequency Cepstral Coefficient (MFCC) & LRNN and vocal tract model: MFCC & HMM, Dynamic time warping (DTW). The performances of proposed models with gamma tone filter bank and wavelet packet as front-ends were also compared. It had been identified that proposed system with wavelet packet as front-end and Back Propagation Neural Network (BPNN) as the recognition method is having good recognition rate over -10 to 10 dB. Both speaker independent and speaker dependent recognition systems had been designed, implemented and tested. Key words: auditory-based, speech recognition, wavelet packet, neural network","PeriodicalId":185608,"journal":{"name":"15th International Conference on Advanced Computing and Communications (ADCOM 2007)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128649525","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 30
Leakage Reduction by Modified Stacking and Optimum ISO Input Loading in CMOS Devices CMOS器件中改进的堆叠和最佳ISO输入负载减少泄漏
K. Sathyaki, R. Paily
{"title":"Leakage Reduction by Modified Stacking and Optimum ISO Input Loading in CMOS Devices","authors":"K. Sathyaki, R. Paily","doi":"10.1109/ADCOM.2007.83","DOIUrl":"https://doi.org/10.1109/ADCOM.2007.83","url":null,"abstract":"In this paper, we have considered different circuit techniques to reduce leakage currents in digital CMOS circuits. In this study, an emphasis is given on gate leakage and sub threshold components of leakage currents. The leakage currents of 65 nm and 45 nm technology node NMOS/PMOS transistor and simple CMOS inverter are compared with low leakage current circuits. The modified stack forcing scheme with optimum iso input load condition gave leakage reduction by a factor of 7 compared to the normal stack forcing technique.","PeriodicalId":185608,"journal":{"name":"15th International Conference on Advanced Computing and Communications (ADCOM 2007)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133803421","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
Tutorial 2: Search Engines in Indian Languages 教程2:印度语言的搜索引擎
S. Sarkar
{"title":"Tutorial 2: Search Engines in Indian Languages","authors":"S. Sarkar","doi":"10.1109/ADCOM.2007.127","DOIUrl":"https://doi.org/10.1109/ADCOM.2007.127","url":null,"abstract":"30590xxv","PeriodicalId":185608,"journal":{"name":"15th International Conference on Advanced Computing and Communications (ADCOM 2007)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116129317","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Technology driven High-Level Synthesis 技术驱动的高层次综合
M. Joseph, N. Bhat, K. Sekaran
{"title":"Technology driven High-Level Synthesis","authors":"M. Joseph, N. Bhat, K. Sekaran","doi":"10.1109/ADCOM.2007.117","DOIUrl":"https://doi.org/10.1109/ADCOM.2007.117","url":null,"abstract":"present High-Level Synthesis knowledgeable of the target Field Programmable Gate Array. All the functions of High-Level Syn- thesis become aware of target technology since parsing. It makes right inference of hardware, by attaching target technology specific attributes to the parse tree. This right inference will guide to generate optimized hardware. Keywords: High-Level Synthesis, Target Technology, At- tribute Grammars, Optimization, FPGA.","PeriodicalId":185608,"journal":{"name":"15th International Conference on Advanced Computing and Communications (ADCOM 2007)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125973113","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Rules for Synthesizing Quantum Boolean Circuits Using Minimized Nearest-Neighbour Templates 利用最小近邻模板合成量子布尔电路的规则
A. Chakrabarti, S. Sur-Kolay
{"title":"Rules for Synthesizing Quantum Boolean Circuits Using Minimized Nearest-Neighbour Templates","authors":"A. Chakrabarti, S. Sur-Kolay","doi":"10.1109/ADCOM.2007.111","DOIUrl":"https://doi.org/10.1109/ADCOM.2007.111","url":null,"abstract":"Quantum Boolean circuit (QBC) synthesis issues are becoming a key area of research in the domain of quantum computing. While Minterm gate based synthesis and Reed-Muller based canonical decomposition techniques are adopted commonly, nearest neighbor synthesis technique for QBC utilizes the quantum logic gates involving only the adjacent target and control qbits for a given quantum network. Instead of Quantum Boolean circuit synthesis using (SNOT gate, we have chosen the template-based technique for synthesis of QBC. This work defines new minimization rules using nearest neighbor templates, which results in reduced number of quantum gates and circuit levels. The need of proper relative placements of the quantum gates in order to achieve the minimum gate configuration has also been discussed.","PeriodicalId":185608,"journal":{"name":"15th International Conference on Advanced Computing and Communications (ADCOM 2007)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130155411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Static Analysis Based Application Specific Dispatch Table Compaction 基于应用程序特定调度表压缩的静态分析
S. Chakraborty, R. Kumar
{"title":"Static Analysis Based Application Specific Dispatch Table Compaction","authors":"S. Chakraborty, R. Kumar","doi":"10.1109/ADCOM.2007.116","DOIUrl":"https://doi.org/10.1109/ADCOM.2007.116","url":null,"abstract":"Object oriented programming languages are increasingly used in software development for embedded systems as they support elegant programming and easier extensibility. Dispatch table is introduced to support message passing mechanism. For a large number of classes and methods the dispatch table is also larger and needs substantial amount of memory space. But memory size is the main constraint in embedded systems. To overcome this bottleneck we have proposed a static analysis based approach for application specific customization of the dispatch table by removing redundant entries. Hence the size of the table is smaller. Our scheme is independent of underlying storage structure of the table. We have tested our proposed approach on real life applications. We have found that our proposed method can safely remove significant number redundant entries during dispatch table construction and hence enhancing the system performance.","PeriodicalId":185608,"journal":{"name":"15th International Conference on Advanced Computing and Communications (ADCOM 2007)","volume":"104 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121102137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An Efficient Approach to Develop Secure Scan Tree for Crypto-Hardware 一种开发加密硬件安全扫描树的有效方法
Gaurav Sengar, Debdeep Mukhopadhayay, D. R. Chowdhury
{"title":"An Efficient Approach to Develop Secure Scan Tree for Crypto-Hardware","authors":"Gaurav Sengar, Debdeep Mukhopadhayay, D. R. Chowdhury","doi":"10.1109/ADCOM.2007.38","DOIUrl":"https://doi.org/10.1109/ADCOM.2007.38","url":null,"abstract":"Scan chain based test has been a common and useful method for testing VLSI designs due to its high controllability and observability. However scan chains have recently been shown to pose security threat to cryptographic chips. Researchers have proposed various prevention architectures like scan tree followed by a compactor, locking and TAP architecture. But these solutions lead to huge hardware overhead and slow the process of testing. In this paper we propose a novel secured scan tree architecture which has very low gate overhead, high fault coverage and is amenable to fast online testing.","PeriodicalId":185608,"journal":{"name":"15th International Conference on Advanced Computing and Communications (ADCOM 2007)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121165655","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
Three-Tier Architecture for Resource Selection in Grid 网格资源选择的三层体系结构
P. Varalakshmi, S. Selvi, A. Ashraf, K. Karthick, S. Aarthy
{"title":"Three-Tier Architecture for Resource Selection in Grid","authors":"P. Varalakshmi, S. Selvi, A. Ashraf, K. Karthick, S. Aarthy","doi":"10.1109/ADCOM.2007.119","DOIUrl":"https://doi.org/10.1109/ADCOM.2007.119","url":null,"abstract":"In most of the trust-based systems, intermediaries, known as brokers, are responsible for the selection of Service Providers (SPs) for consumer requests. In such models, the intermediaries gain monetary benefit for each of the transactions made through them. This may lead to favoritism & bias in the selection of suitable SPs. This challenge may be overcome by the proposed three-tier framework where the Regional Resource Administrators (RRAs), resource brokers and the SPs are arranged into three-tiers. RRAs derive their compensation from registration, renewal, and audit charges paid by broker community, not from individual transactions. RRAs serve the consumer community in an `unbiased' and `trustworthy' manner. In this model, the trust-indices of each of the entities are computed based on the feedback provided by other entities after each transaction. These trust-indices of brokers, consumers and SPs are updated dynamically at the RRA's and the broker's sites respectively, to ensure trustworthy services and to quicken the selection of `suitable' SPs. A B-Tree indexing scheme has been proposed to further improve the selection process. Global trust-indices of the SPs are computed using Back Propagation Neural Networks, further quickens the selection of a `suitable' SP. Our model shows a marked improvement in job-success-rate for various percentages of malicious entities. The selection query- cost for each transaction is reduced using B-Tree thereby improving the selection response.","PeriodicalId":185608,"journal":{"name":"15th International Conference on Advanced Computing and Communications (ADCOM 2007)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122659124","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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