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Design challenges of PLL, I/O, and mixed signal circuits in advanced CMOS/SOI technologies 先进CMOS/SOI技术中锁相环、I/O和混合信号电路的设计挑战
Proceedings of the 2004 IEEE Dallas/CAS Workshop Implementation of High Performance Circuits Pub Date : 2004-11-30 DOI: 10.1109/DCAS.2004.1360442
H. Sánchez
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