{"title":"Overlap elimination in floorplans","authors":"G. Vijayan","doi":"10.1109/ISVD.1991.185110","DOIUrl":"https://doi.org/10.1109/ISVD.1991.185110","url":null,"abstract":"Describes an algorithm for eliminating/reducing overlaps among blocks (macros) in VLSI chip floorplans. These blocks are assumed to be rectangular and can be either preplaced or movable. A movable block can have a fixed or a flexible shape. The authors describe applications for such an algorithm in the floorplanning process. The approach discussed in the paper is targeted towards macro cell based sea-of-gates designs.<<ETX>>","PeriodicalId":183602,"journal":{"name":"[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-01-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133194956","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}