Overlap elimination in floorplans

Abstract

Describes an algorithm for eliminating/reducing overlaps among blocks (macros) in VLSI chip floorplans. These blocks are assumed to be rectangular and can be either preplaced or movable. A movable block can have a fixed or a flexible shape. The authors describe applications for such an algorithm in the floorplanning process. The approach discussed in the paper is targeted towards macro cell based sea-of-gates designs.<>