2020 International Symposium on Devices, Circuits and Systems (ISDCS)最新文献

A Smart Hybrid Solid-State-Drive Storage System based on Nonvolatile Storage-Class-Memories : Device, Circuit Design and Architecture 基于非易失性存储类存储器的智能混合固态驱动器存储系统:器件、电路设计和体系结构

2020 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2020-03-04 DOI: 10.1109/ISDCS49393.2020.9263016

K. Johguchi

引用次数: 1

Optimization of stacked di-electric bilayer at rear side of PERC solar cell for better light management PERC太阳能电池后侧堆叠双电双层优化光管理

2020 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2020-03-04 DOI: 10.1109/ISDCS49393.2020.9263008

N. C. Mandal, Pritam Banerjee, A. Nandi, Sukanta Bose, G. Das, Shantanu Maity, P. Chaudhuri, H. Saha

引用次数: 1

Surface Recognition and Speed Adjustment of Humanoid Robot Using External Control Circuit 基于外部控制电路的人形机器人表面识别与速度调节

2020 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2020-03-04 DOI: 10.1109/ISDCS49393.2020.9263013

S. Bhattacharya, A. Luo, S. Dutta, M. Miura-Mattausch, H. Mattausch

{"title":"Surface Recognition and Speed Adjustment of Humanoid Robot Using External Control Circuit","authors":"S. Bhattacharya, A. Luo, S. Dutta, M. Miura-Mattausch, H. Mattausch","doi":"10.1109/ISDCS49393.2020.9263013","DOIUrl":"https://doi.org/10.1109/ISDCS49393.2020.9263013","url":null,"abstract":"We propose a surface-recognition-based speed- adjustment system for humanoid robot during walking on different surfaces. Two different types of surfaces are considered in the reported experiment (example, rough and smooth surface). Force-sensors, classification unit and external- controller-circuits are applied for surface-recognition and speed-adjustment. For surface-recognition the Euclidean distance is used to calculate the nearest-neighbor reference pattern for the feature of the waking pattern generated online. The mean-absolute-value (MAV) feature vector is used to classify two different surfaces. To distinguish two different surfaces, the hardware accelerated decision-signals are generated across LEDs in the form of analog voltages (maximum peak voltage 212 mV for rough-surface and 147 mV for smooth surfaces respectively with detection time 2.8 s and 1.5 s). The external-controller-circuit is used for speed- adjustment using decision-signal coming from LED. It is observed that, when robot is moving from rough-surfaces to smooth-surfaces, the speed of the robot motion changes from 190 frames/stride (i.e. slow-speed) to 160 frames/stride (i.e. medium-speed) with 4.9 s transition time, whereas from smooth- surface to rough-surface transitions, the transition time takes 4.5 s. The experimentally measurement results of speed- adjustment time after surface transition are useful for fast and stable recognition-system design.","PeriodicalId":177307,"journal":{"name":"2020 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116542561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A New Digital Color Image Watermarking Algorithm with its FPGA and ASIC Implementation 一种新的数字彩色图像水印算法及其FPGA和ASIC实现

2020 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2020-03-04 DOI: 10.1109/ISDCS49393.2020.9263003

Shivdeep, Sudip Ghosh, H. Rahaman

{"title":"A New Digital Color Image Watermarking Algorithm with its FPGA and ASIC Implementation","authors":"Shivdeep, Sudip Ghosh, H. Rahaman","doi":"10.1109/ISDCS49393.2020.9263003","DOIUrl":"https://doi.org/10.1109/ISDCS49393.2020.9263003","url":null,"abstract":"In the world full of visual content, digital image authentication has become an important concern. Digital image watermarking can play a key role in this regard. Though several techniques and algorithms exist in literature but color image watermarking techniques with its hardware implementation are few. The objective of this paper is to introduce a new algorithm for watermarking a color cover image using color watermark. The basic technique is to alter the pixel values of the cover image, based on the similarity between cover image and watermark. The amount of alteration can be controlled by a parameter called modulation index, which also decides the quality of cover image as well as that of extracted watermark image. A pseudo-noise code is used for embedding and extraction of the watermark, hence only authorized users having exact pseudo-noise code can extract the watermark. This is an invisible watermarking technique, so it doesn’t affect the appearance of the original image significantly. Furthermore, FPGA as well as ASIC based hardware implementation of the aforesaid algorithm is realized. For real-time application hardware realization is more efficient than software implementation. The proposed algorithm and its VLSI implementation have been compared with stat-of-art research work present in literature. Throughput of the proposed algorithm is high and it can also be used for digital video watermarking.","PeriodicalId":177307,"journal":{"name":"2020 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122808406","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

A New Blind Invisible and Semi-Fragile Colour Image Watermarking Scheme in Spatial Domain 一种新的空间域盲不可见半脆弱彩色图像水印方案

2020 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2020-03-04 DOI: 10.1109/ISDCS49393.2020.9263020

Joshua Roy Palathinkal, Yuvam Bhateja, Sudip Ghosh, H. Rahaman

引用次数: 1

A First Principle Approach to Investigate Electrical doping-Dependent Conductance Changes in Adenine-Thymine Hetero-structure Chain using GaAs Nanotube 利用GaAs纳米管研究腺嘌呤-胸腺嘧啶异质结构链中电掺杂相关电导变化的第一性原理方法

2020 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2020-03-04 DOI: 10.1109/ISDCS49393.2020.9262997

D. Dey, Pradipta Roy, D. De

引用次数: 0

Design of Tunnel Junction Engineered Dopingless TFET for Low power Applications 用于低功耗应用的隧道结工程无掺杂TFET的设计

2020 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2020-03-04 DOI: 10.1109/ISDCS49393.2020.9262986

A. Verma, Suruchi Sharma, Sneha Bharti, Manisha Bharti, B. Kaur

{"title":"Design of Tunnel Junction Engineered Dopingless TFET for Low power Applications","authors":"A. Verma, Suruchi Sharma, Sneha Bharti, Manisha Bharti, B. Kaur","doi":"10.1109/ISDCS49393.2020.9262986","DOIUrl":"https://doi.org/10.1109/ISDCS49393.2020.9262986","url":null,"abstract":"Dopingless tunnel field-effect transistor (DLTFET) has emerged to eliminate MOSFET as promising minimal-power applications in emerging technologies. While, throughout this paper, we produced a new DLTFET based charge plasma tunnel junction. A gallium arsenide (GaAs) pocket is positioned around across source and channel interface of the silicon film, increasing the likelihood of tunneling. Although GaAs energy bandgap seems to be significantly beyond a silicon energy bandgap, it does have fast electron mobility and minimal tunneling mass, contributing to enhanced current drivability at the interface. In contrast, with the standard DLTFET and tunnel junction engineered DLTFET (GaAs-DLTFET) we properly assessed the DC and analog/RF values in specific terms of energy band diagram, electric field, carrier concentrations, transfer characteristics, transconductance, parasitic capacitance, cutoff frequency. The simulation of the conventional DLTFET and proposed device (GaAs-DLTFET) has been performed using the ATLAS device simulator. The proposed device has shown an increased ON-current (~100 μA/μm) and improved subthreshold swing (~10.25 mV/decade). The excellent characteristics are demonstrated by GaAs-DLTFET and linearity parameters are analyzed to give the justification that a device is a worthy option for future high-frequency analog/RF applications with minimal use of operational power.","PeriodicalId":177307,"journal":{"name":"2020 International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"128 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130022256","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Modeling of Short-Channel Effect on Multi-Gate MOSFETs for Circuit Simulation 多栅极mosfet短通道效应的电路仿真建模

2020 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2020-03-04 DOI: 10.1109/ISDCS49393.2020.9263000

F. A. Herrera, M. Miura-Mattausch, T. Iizuka, H. Kikuchihara, Y. Hirano, H. Mattausch

引用次数: 3

Combination of Transistors’ compact model and Big Data For successful Smart Factory 晶体管的紧凑模型与大数据的结合，成功打造智能工厂

2020 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2020-03-04 DOI: 10.1109/ISDCS49393.2020.9262981

S. Yoshitomi

引用次数: 3

Growth of ZnSnO3 nano-crystalloids on Sisubstrate by employing chemical bath deposition (CBD) technique for self-powered UV-light sensing applications 利用化学浴沉积(CBD)技术在硫酸板上生长ZnSnO3纳米晶体，用于自供电紫外传感

2020 International Symposium on Devices, Circuits and Systems (ISDCS) Pub Date : 2020-03-04 DOI: 10.1109/ISDCS49393.2020.9262987

Anannya Bhattacharya, Susomon Dutta, Sreeparna Paul, Subhrajit Sikdar, S. Chattopadhyay

引用次数: 0