Design of Tunnel Junction Engineered Dopingless TFET for Low power Applications

Abstract

Dopingless tunnel field-effect transistor (DLTFET) has emerged to eliminate MOSFET as promising minimal-power applications in emerging technologies. While, throughout this paper, we produced a new DLTFET based charge plasma tunnel junction. A gallium arsenide (GaAs) pocket is positioned around across source and channel interface of the silicon film, increasing the likelihood of tunneling. Although GaAs energy bandgap seems to be significantly beyond a silicon energy bandgap, it does have fast electron mobility and minimal tunneling mass, contributing to enhanced current drivability at the interface. In contrast, with the standard DLTFET and tunnel junction engineered DLTFET (GaAs-DLTFET) we properly assessed the DC and analog/RF values in specific terms of energy band diagram, electric field, carrier concentrations, transfer characteristics, transconductance, parasitic capacitance, cutoff frequency. The simulation of the conventional DLTFET and proposed device (GaAs-DLTFET) has been performed using the ATLAS device simulator. The proposed device has shown an increased ON-current (~100 μA/μm) and improved subthreshold swing (~10.25 mV/decade). The excellent characteristics are demonstrated by GaAs-DLTFET and linearity parameters are analyzed to give the justification that a device is a worthy option for future high-frequency analog/RF applications with minimal use of operational power.