{"title":"Influence of the power-consumption at non-fundamental frequency on Passive intermodulation generation","authors":"K. Takada, D. Ishibashi, N. Kuga","doi":"10.1109/ICSJ.2012.6523468","DOIUrl":"https://doi.org/10.1109/ICSJ.2012.6523468","url":null,"abstract":"In this paper, the influence of the power-consumption at non-fundamental frequency on Passive Intermodulation generation is investigated. It is shown that nonlinear coefficients depend on the total power including the power of non-fundamental frequency, and the power-consumption at non-fundamental frequency affects PIM generation. Through a comparison of two types of PIM-sources characterized by different mechanism such as plated coaxial connectors and diodes, it is also shown that the power dependence of a3 is dominant in plated connector while the higher order PIM in multi-tone tests affects the 3rd PIM level in 2-tone tests when PIM-source is a diode-like junction.","PeriodicalId":174050,"journal":{"name":"2012 2nd IEEE CPMT Symposium Japan","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130690052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Statistical study of nano-scale VLSI interconnect crosstalk and its induced power estimation","authors":"M. Mehri, R. Sarvari, A. Seyedolhosseini","doi":"10.1109/ICSJ.2012.6523436","DOIUrl":"https://doi.org/10.1109/ICSJ.2012.6523436","url":null,"abstract":"Crosstalk due to the capacitive and inductive coupling has adverse effect on the circuit performance. In this paper crosstalk voltage and its induced power are studied for a stochastic environment bus with specific physical structure. Input switching pattern, driver, and load are swept in wide range for VLSI application to study crosstalk variation. Crosstalk and power is extracted to drive mean and standard deviation for implemented structures. The crosstalk mean and its induced power get lower with increasing of the load and driver resistance. This phenomenon is proportional to shrinking the technology.","PeriodicalId":174050,"journal":{"name":"2012 2nd IEEE CPMT Symposium Japan","volume":"92 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116917787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Youngseok Kim, T. Sugahara, S. Nagao, K. Suganuma, M. Ueshima, H. Albrecht, K. Wilke, J. Strogies
{"title":"Effects of additional Ni and Co on microstructural evolution in Sn-Ag-Bi-In solder under current stressing","authors":"Youngseok Kim, T. Sugahara, S. Nagao, K. Suganuma, M. Ueshima, H. Albrecht, K. Wilke, J. Strogies","doi":"10.1109/ICSJ.2012.6523429","DOIUrl":"https://doi.org/10.1109/ICSJ.2012.6523429","url":null,"abstract":"With continuously shrinking process rules of electronic devices, the decreasing dimension of interconnections results in increasing electrical current density, and recalls the risk of massive electromigration (EM) of metal elements in solder joints. This paper reports that minor additions of Ni and/or Co to Sn-Ag-Bi-In lead-free solder to improve the EM behavior and microstructural evolutions in the solder material subjected to high electric current density of 10 kA/cm2 over 200 hours. With additional Co elements, EM resistance of solder joint was improved as twice before with microstructural evolution by it.","PeriodicalId":174050,"journal":{"name":"2012 2nd IEEE CPMT Symposium Japan","volume":"104 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132958787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. Morikawa, T. Murayama, T. Sakuishi, A. Tanaka, Y. Nakamuta, K. Suu
{"title":"Low cost TSV integration for advanced packaging technologies","authors":"Y. Morikawa, T. Murayama, T. Sakuishi, A. Tanaka, Y. Nakamuta, K. Suu","doi":"10.1109/ICSJ.2012.6523417","DOIUrl":"https://doi.org/10.1109/ICSJ.2012.6523417","url":null,"abstract":"In recent years, “2.5D silicon interposers” and “Full 3D stacked” technology for high-performance LSI has attracted much attention since this technology can solve interconnection problems using TSV (Through Silicon Via) to electrically connect stacked LSI. 2.5D and 3D Si integration has great advantages over conventional 2D devices such as high packaging density, small wire length, high-speed operation, low power consumption, and high feasibility for parallel processing. The novel etching technology has provided for TSV fabrication which is the epoch-making and practical new technology without “Bosch” method. This new etch technology is “direct etching” method. So far, anisotropic and high Si etch rate with highly photo-resist selectivity is a tall order, but new direct etching can achieve higher than aspect ratio above 10 at the etching speed that is more than 10um/min in TSV of 10um diameter. Of course the selectivity of photo-resist is realized more than 1:30, and the sidewall is the smooth finish less than 50 nm. The direct etch is environment conscious process. This is because it does not use fluorocarbon gases in direct Si etching, which main gases are SF6 and O2. Therefore, this direct etch process is lower cost than gas switching process. In addition, the smooth sidewall has also brought about low cost of deposition processes for PE-CVD and PVD.","PeriodicalId":174050,"journal":{"name":"2012 2nd IEEE CPMT Symposium Japan","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125702176","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Sano, N. Nakata, M. Nakahama, A. Matsutani, F. Koyama
{"title":"Athermal and tunable VCSELs with a thermally actuated cantilever structure for WDM optical interconnects","authors":"H. Sano, N. Nakata, M. Nakahama, A. Matsutani, F. Koyama","doi":"10.1109/ICSJ.2012.6523405","DOIUrl":"https://doi.org/10.1109/ICSJ.2012.6523405","url":null,"abstract":"We demonstrate the athermal operation and the wavelength tuning of 850nm GaAs-based vertical cavity surface emitting lasers with a thermally actuated cantilever structure. The thermal actuation of a top DBR mirror enables us to compensate the temperature drift of lasing wavelengths. A small temperature dependence of -0.011 nm/K and wavelength tuning of 4 nm were obtained with a newly designed T-shape membrane structure at the same time.","PeriodicalId":174050,"journal":{"name":"2012 2nd IEEE CPMT Symposium Japan","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123567214","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Development of low temperature curable positive tone photosensitive dielectric material","authors":"A. Tanimoto, K. Abe, S. Nobe, H. Matsutani","doi":"10.1109/ICSJ.2012.6523450","DOIUrl":"https://doi.org/10.1109/ICSJ.2012.6523450","url":null,"abstract":"Recently, low temperature curable photosensitive dielectric materials are attracting much attention in semiconductor package application to avoid thermal damages of the semiconductor devices. AH-1000 is a low temperature curable positive tone photo- definable material. In this paper, we report the mechanical, thermal, and adhesion property of AH-1000 together with its chemical resistance. A wafer level package (WLP) using AH-1000 as redistribution layers indicates that AH-1000 has enough mechanical toughness. It also suggests that higher elongation and lower Young's modulus are effective to eliminate mechanical stress to solder balls for dielectrics.","PeriodicalId":174050,"journal":{"name":"2012 2nd IEEE CPMT Symposium Japan","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124651128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Experimental study on thermal performance of loop heat pipes with flat evaporator for LSI package","authors":"T. Shioga, Susumu Ogata, Yoshihiro Mizuno","doi":"10.1109/ICSJ.2012.6523475","DOIUrl":"https://doi.org/10.1109/ICSJ.2012.6523475","url":null,"abstract":"Thermal performance of a loop heat pipe (LHP) equipped with a flat evaporator and a compensation chamber integrated onto the evaporator and separated from the evaporator was experimentally investigated. The heat leak in the flat evaporator is a critical problem as it results in the degradation of the heat transport characteristics of the LHP. In this paper, the heat leak quantity during the steady-state operation of the LHP was calculated by carrying out a thermal energy balance analysis for the flat evaporator. From the results, the heat conduction along the case sidewall of the evaporator dominated the heat leak on the evaporator, and it was found that the heat leak from the heat source to the compensation chamber decreased to 5% or less of the applied input power due to the reduced heat conduction of the evaporator casing.","PeriodicalId":174050,"journal":{"name":"2012 2nd IEEE CPMT Symposium Japan","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124848834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Warpage modeling for 3D packages","authors":"M. Amagai, Y. Suzuki","doi":"10.1109/EPTC.2012.6507131","DOIUrl":"https://doi.org/10.1109/EPTC.2012.6507131","url":null,"abstract":"Package warpage is a primary concern in a package-on-package. To enhance the accuracy of modeling prediction, viscoelastic parameters, the change of material properties and cure shrinkage were studied with a dynamic modulus analysis (DMA) and a thermal mechanical analysis (TMA) for a mold compound. Material properties obtained from the TMA, DMA tools were introduced to finite-element-based models. The validation of models was verified with a shadow moiré for package warpage. As model simplification, inverse approach is described for an example of package warpage.","PeriodicalId":174050,"journal":{"name":"2012 2nd IEEE CPMT Symposium Japan","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114619854","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Introduction of the automotive application of TSV device","authors":"T. Kamada","doi":"10.1109/ICSJ.2012.6523457","DOIUrl":"https://doi.org/10.1109/ICSJ.2012.6523457","url":null,"abstract":"We introduce the automotive application of 3D integration of a semiconductor and TSV technology in this paper. We chose the stereo camera of the driving support system as the application of this trial production, because it has strong requirement about the size, the performance and the reliability from the market, and also it is sensitive device but easy to find the error.","PeriodicalId":174050,"journal":{"name":"2012 2nd IEEE CPMT Symposium Japan","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121681145","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Formation of circuit patterns on the only modification area using selective electroless deposition","authors":"K. Baba, M. Sugimoto, M. Watanabe, T. Yumoto","doi":"10.1109/ICSJ.2012.6523467","DOIUrl":"https://doi.org/10.1109/ICSJ.2012.6523467","url":null,"abstract":"The printed wiring board is contained in most electronic parts. A lot of the printed wiring boards are manufactured by the subtractive process. However, the subtractive process needs a lot of numbers of production processes. Therefore, we examined new manufacturing process that the method of forming the metal film only to a necessary part of the substrate. We executed the examination that applied selective electroless plating on the substrate. The UV irradiation and the laser irradiation attracted attention as the pretreatment technique to perform the selective plating. In addition, to solve the problem of short out in the circuit, the examination of anisotropy growth up electroless plating was examined. In these results, anisotropic growth by electroless nickel plating was found to depend on nonlinear diffusion of the Pb and Bi inhibitors at the pattern edges, where the geometry of the film growth changed depending on the species. When Pb was employed, plating growth with a trapezoidal geometry occurred which was advantageous to pattern formation. Moreover, when Pb was used in combination with Bi, the anisotropic growth became possible at lower concentrations. Regarding the selective deposition phenomenon, the direct pattern plating process was improved by initial adsorption of thiourea onto the surface by immersing the substrate in a solution that contained the inhibitor instead of initial selective plating.","PeriodicalId":174050,"journal":{"name":"2012 2nd IEEE CPMT Symposium Japan","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129832992","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}