A. Barnes, Ryan Fernando, Kasuni Mettananda, R. Ragel
{"title":"Improving the throughput of the AES algorithm with multicore processors","authors":"A. Barnes, Ryan Fernando, Kasuni Mettananda, R. Ragel","doi":"10.1109/ICIInfS.2012.6304791","DOIUrl":"https://doi.org/10.1109/ICIInfS.2012.6304791","url":null,"abstract":"AES, Advanced Encryption Standard, can be considered the most widely used modern symmetric key encryption standard. To encrypt/decrypt a file using the AES algorithm, the file must undergo a set of complex computational steps. Therefore a software implementation of AES algorithm would be slow and consume large amount of time to complete. The immense increase of both stored and transferred data in the recent years had made this problem even more daunting when the need to encrypt/decrypt such data arises. As a solution to this problem, in this paper, we present an extensive study of enhancing the throughput of AES encryption algorithm by utilizing the state of the art multicore architectures. We take a sequential program that implements the AES algorithm and convert the same to run on multicore architectures with minimum effort. We implement two different parallel programmes, one with the fork system call in Linux and the other with the pthreads, the POSIX standard for threads. Later, we ran both the versions of the parallel programs on different multicore architectures and compared and analysed the throughputs between the implementations and among different architectures. The pthreads implementation outperformed in all the experiments we conducted and the best throughput obtained is around 7Gbps on a 32-core processor (the largest number of cores we had) with the pthreads implementation.","PeriodicalId":171993,"journal":{"name":"2012 IEEE 7th International Conference on Industrial and Information Systems (ICIIS)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128953493","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Vehicle to grid and grid to vehicle bidirectional power flow at unity power factor with DC ripple compensation","authors":"A. Verma, Bhim Singh, D. Shahani","doi":"10.1109/ICIINFS.2012.6304811","DOIUrl":"https://doi.org/10.1109/ICIINFS.2012.6304811","url":null,"abstract":"In this paper, a single-phase AC-DC converter is proposed with an auxiliary circuit for DC ripple compensation and a DC-DC converter for bidirectional power flow between PHEV (Plug in Hybrid Electric Vehicle) and power grid. There is an existence of second-order harmonic ripple voltage on the DC bus of single phase PWM voltage source converter (VSC). The low frequency ripple voltages normally filtered using a bulk capacitor at the DC bus which results in low power density and require large space. An auxiliary circuit for DC ripple compensation reduces the size of DC link capacitor. The overall converter configuration, with bidirectional power flow regulates unity power factor at the grid. In first stage, a 230 V 50 Hz AC supply is converted in to 400 V DC with ripple compensation using a single-phase VSC and in the second stage, the charging and discharging of the PHEV battery is monitor through a buck boost DC-DC converter. Buck mode is used for charging and boost mode is used for discharging. In case of discharging, energy sent back to the grid at 230V, 50 Hz. A battery rating of 1.8 kW at 120V is used in PHEV.","PeriodicalId":171993,"journal":{"name":"2012 IEEE 7th International Conference on Industrial and Information Systems (ICIIS)","volume":"126 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117293959","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Accelerating string matching for bio-computing applications on multi-core CPUs","authors":"Damayanthi Herath, C. Lakmali, R. Ragel","doi":"10.1109/ICIInfS.2012.6304784","DOIUrl":"https://doi.org/10.1109/ICIInfS.2012.6304784","url":null,"abstract":"Huge amount of data in the form of strings are being handled in bio-computing applications and searching algorithms are quite frequently used in them. Many methods utilizing on both software and hardware are being proposed to accelerate processing of such data. The typical hardware-based acceleration techniques either require special hardware such as generalpurpose graphics processing units (GPGPUs) or need building a new hardware such as an FPGA based design. On the other hard, software-based acceleration techniques are easier since they only require some changes in the software code or the software architecture. Typical software-based techniques make use of computers connected over a network, also known as a network grid to accelerate the processing. In this paper, we test the hypothesis that multi-core architectures should provide better performance in this kind of computation, but still it would depend on the algorithm selected as well as the programming model being utilized. We present the acceleration of a string-searching algorithm on a multi-core CPU via a POSIX thread based implementation. Our implementation on an 8-core processor (that supports 16-threads) resulted in 9x throughput improvement compared to a single thread implementation.","PeriodicalId":171993,"journal":{"name":"2012 IEEE 7th International Conference on Industrial and Information Systems (ICIIS)","volume":"90 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123531913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Field experience of generator stator insulation monitoring and failures in Sri Lanka","authors":"G. A. Jayantha, M. Fernando","doi":"10.1109/ICIINFS.2012.6304766","DOIUrl":"https://doi.org/10.1109/ICIINFS.2012.6304766","url":null,"abstract":"This paper describes usage of several condition monitoring techniques to evaluate the failures and failure modes of generator stator insulation. Authors have included several case studies of insulation weaknesses and failures of generators in Sri Lanka. Author's recommendations to use DC ramp test for the evaluation of failures of generators and effect of moisture in stator insulation, are highlighted.","PeriodicalId":171993,"journal":{"name":"2012 IEEE 7th International Conference on Industrial and Information Systems (ICIIS)","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116195191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Balagopalan, M. Varghese, N. Padmanabhan, N. Thomas
{"title":"Power Vectors to identify coalition partners in Game Theory controlled electricity markets","authors":"S. Balagopalan, M. Varghese, N. Padmanabhan, N. Thomas","doi":"10.1109/ICIINFS.2012.6304806","DOIUrl":"https://doi.org/10.1109/ICIINFS.2012.6304806","url":null,"abstract":"Modeling the transmission sector of electricity markets is a challenge, due to issues like violation of network operating limits, information asymmetry and conflict of incentives. In this paper we address all these concerns via an innovative method of amalgamating the Discos into coalitions so as to cause counter-flows in lines. The complexities of transmission operation are thus modeled in a Cooperative Game Theory environment. An intuitive method based on graph theory is then proposed to identify coalition partners among Discos who should rationally cooperate, to incur the minimum overall Transmission Service Charge. The technique is illustrated using a 24 bus real power system.","PeriodicalId":171993,"journal":{"name":"2012 IEEE 7th International Conference on Industrial and Information Systems (ICIIS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133781583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A genetic algorithm for multicasting in resource constraint WDM mesh networks","authors":"S. Barat, A. Pradhan, T. De","doi":"10.1109/ICIINFS.2012.6304820","DOIUrl":"https://doi.org/10.1109/ICIINFS.2012.6304820","url":null,"abstract":"Multicast Routing and Wavelength Assignment (MRWA) in WDM mesh network is a vital problem in one-to-many communication in photonic domain. The majority of works done in this problem is based on different heuristics. In this paper we have formulated the problem as a delay controlled splitting minimization problem and applied a genetic algorithm to provide a near optimal solution for multicasting in WDM mesh network. The major contribution in this paper is that we have taken multiple objectives in account including QoS parameter like delay and network resource parameters like splitters, optical channels while generating light-tree for each multicast session request. Here we have designed a novel tunable fitness function which provides efficient solution for MRWA problem with multiple conflicting objectives in a constrained setup. The simulation results establish the truth of this claim significantly.","PeriodicalId":171993,"journal":{"name":"2012 IEEE 7th International Conference on Industrial and Information Systems (ICIIS)","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115436953","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A secure kiosk centric mobile payment protocol using symmetric key techniques","authors":"V. C. Sekhar, M. Sarvabhatla","doi":"10.1109/ICIINFS.2012.6304779","DOIUrl":"https://doi.org/10.1109/ICIINFS.2012.6304779","url":null,"abstract":"In this paper, we propose a secure kiosk(Merchant) centric mobile payment scenario in which the customer is disconnected from issuer due to lack of internet connection(various reasons are mentioned below) and still can be used for mobile transaction. Our protocol protects the real identity of the customer during the transaction flow. The proposed protocol is based on symmetric key cryptography which further reduces computation at all the entities of the protocol. The protocol satisfies all the security requirements met by the existing standard protocols like SET, iKP, Kungpisdan et al and Tellez et al. Based on the author knowledge, the proposed protocol is the first protocol which satisfies all the cases of Non Repudiation. All the above mentioned protocols satisfies only Non Repudiation of Origin, where as our proposed protocol satisfies Non repudiation of Receipt, Non repudiation of Submission, Non repudiation of Delivery.","PeriodicalId":171993,"journal":{"name":"2012 IEEE 7th International Conference on Industrial and Information Systems (ICIIS)","volume":"112 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116878767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Composite active and reactive power compensation of distribution networks","authors":"Satish Kansal, Vishal Kumar, B. Tyagi","doi":"10.1109/ICIINFS.2012.6304764","DOIUrl":"https://doi.org/10.1109/ICIINFS.2012.6304764","url":null,"abstract":"In this paper the application of Particle Swarm Optimization (PSO) technique for active and reactive power compensation of power distribution loss has been proposed. The active and reactive power compensation can be obtained by the optimal placement of DG and Capacitor. The evaluation of optimal power factor of the system has also been carried out in this work. To solve the optimal placement problem PSO technique has been used. The locations of DG and capacitor play an important role in maintaining voltage profiles. The results obtained from PSO have also been compared with the fast analytical approach. The proposed technique is tested on 33-bus power distribution system.","PeriodicalId":171993,"journal":{"name":"2012 IEEE 7th International Conference on Industrial and Information Systems (ICIIS)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129107977","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Control of switching surges due to energization of 765kV UHV transmission line","authors":"K. Ravishankar, D. Thukaram","doi":"10.1109/ICIINFS.2012.6304780","DOIUrl":"https://doi.org/10.1109/ICIINFS.2012.6304780","url":null,"abstract":"Reduction of switching surge over voltages allows an economic design of UHV transmission system with reduced insulation. The various means of switching surge over voltage control with pre-insertion resistors/closing resistors, shunt reactors and controlled switching are illustrated. The switching surge over voltages during the energization of series compensated line are compared with uncompensated line. An Electromagnetic transients program has been developed for studying the effect of various means of control of switching transients during 765kV UHV transmission line energization. This paper presents the studies carried out on switching surges control in 765kV UHV transmission line energization.","PeriodicalId":171993,"journal":{"name":"2012 IEEE 7th International Conference on Industrial and Information Systems (ICIIS)","volume":"2006 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125554469","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Ride through of grid faults for PMSG based wind energy conversion systems","authors":"H. Ahuja, G. Bhuvaneswari, R. Balasubramanian","doi":"10.1109/ICIINFS.2012.6304809","DOIUrl":"https://doi.org/10.1109/ICIINFS.2012.6304809","url":null,"abstract":"Permanent magnet Synchronous Generators (PMSG) are becoming popular for wind energy conversion systems (WECS) nowadays due to the possibility of gearless operation even in grid connected mode. However, these systems have serious problems during fault conditions such as over speeding of the generator speed and undue increase in the DC link capacitor voltage. This paper proposes a complete coordinated control of the generator and the power electronic converters to achieve fault-ride-through (FRT) capability. The analysis and simulation of a PMSG based WECS is presented here for normal working conditions as well as for fault conditions. The uniqueness of the model includes de-loading of the generator via machine side converter, active and reactive power control through grid side converter to support voltage control during fault. The simulation results prove the capability of the system to harness maximum power during normal conditions and to achieve FRT during a severe three-phase fault.","PeriodicalId":171993,"journal":{"name":"2012 IEEE 7th International Conference on Industrial and Information Systems (ICIIS)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123879622","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}