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2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.最新文献

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A delay-line based DCO for multimedia applications using digital standard cells only 用于仅使用数字标准单元的多媒体应用的基于延迟线的DCO
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI: 10.1109/ISSCC.2003.1234371
E. Roth, M. Thalmann, N. Felber, W. Fichtner
{"title":"A delay-line based DCO for multimedia applications using digital standard cells only","authors":"E. Roth, M. Thalmann, N. Felber, W. Fichtner","doi":"10.1109/ISSCC.2003.1234371","DOIUrl":"https://doi.org/10.1109/ISSCC.2003.1234371","url":null,"abstract":"A digital clock synthesizer consisting of digital standard cells with 0.5ppm frequency resolution for multimedia applications is implemented in a 0.6/spl mu/m CMOS process. The synthesizer produces an output frequency ranging from 11.1MHz to 12.5MHz with a 100MHz input clock. A DLL-based calibration mechanism tracks PTV variations during operation.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125354864","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 24
A 128 /spl times/ 128 pixel 120 dB dynamic range vision sensor chip for image contrast and orientation extraction 一个128 /spl倍/ 128像素120db动态范围视觉传感器芯片，用于图像对比度和方向提取
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI: 10.1109/ISSCC.2003.1234278
Pierre-François Ruedi, P. Heim, F. Kaess, E. Grenet, F. Heitger, P.-Y. Burgi, S. Gyger, P. Nussbaum
{"title":"A 128 /spl times/ 128 pixel 120 dB dynamic range vision sensor chip for image contrast and orientation extraction","authors":"Pierre-François Ruedi, P. Heim, F. Kaess, E. Grenet, F. Heitger, P.-Y. Burgi, S. Gyger, P. Nussbaum","doi":"10.1109/ISSCC.2003.1234278","DOIUrl":"https://doi.org/10.1109/ISSCC.2003.1234278","url":null,"abstract":"This vision sensor outputs luminance, contrast magnitude and contrast orientation of image features for surveillance and automotive applications. The sensor produces a contrast representation with a dynamic range of 120 dB and a sensitivity of 2%. The chip is fabricated in a 0.5 /spl mu/m 3M 2P process and dissipates 300 mW at 3.3 V.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125424848","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 114
A 30Gb/s 1:4 demultiplexer in 0.12/spl mu/m CMOS 30Gb/s 1:4解复用器，0.12/spl mu/m CMOS
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI: 10.1109/ISSCC.2003.1234255
A. Rylyakov, S. Rylov, H. Ainspan, S. Gowda
{"title":"A 30Gb/s 1:4 demultiplexer in 0.12/spl mu/m CMOS","authors":"A. Rylyakov, S. Rylov, H. Ainspan, S. Gowda","doi":"10.1109/ISSCC.2003.1234255","DOIUrl":"https://doi.org/10.1109/ISSCC.2003.1234255","url":null,"abstract":"A 1:4 demultiplexer, implemented in 0.12/spl mu/m SOI and bulk CMOS technology, operates with a BER below 10/sup -13/ at 30Gb/s (SOI) and 26Gb/s (bulk) input data rates (2/sup 7/-1 PRBS), drawing 200mA from a 2V supply. At 1.2V, the chips draw 100mA and operates at input data rates of 21Gb/s (SOI) and 18Gb/s (bulk). The design has an active area of 300/spl mu/m /spl times/ 90/spl mu/m.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"180 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126948767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
A 1.5 V 14 b 100 MS/s self-calibrated DAC 一个1.5 V 14b 100 MS/s自校准DAC
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI: 10.1109/ISSCC.2003.1234234
Yonghua Cong, R. Geiger
{"title":"A 1.5 V 14 b 100 MS/s self-calibrated DAC","authors":"Yonghua Cong, R. Geiger","doi":"10.1109/ISSCC.2003.1234234","DOIUrl":"https://doi.org/10.1109/ISSCC.2003.1234234","url":null,"abstract":"A calibrated 14 b current-steering DAC is fabricated in a 0.13 /spl mu/m digital CMOS process. The DAC achieves 14 b static linearity with a single 1.5 V supply, and the core occupies 0.1 mm/sup 2/. Dynamic linearity is improved through reduction of parasitic effects. At 100 MS/s, the SFDR is 82 dB and 62 dB at signals of 0.9 MHz and 42.5 MHz, respectively. Power consumption is 16.7 mW.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117323302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 135
SXGA pinned photodiode CMOS image sensor in 0.35 /spl mu/m technology SXGA固定光电二极管CMOS图像传感器0.35 /spl mu/m技术
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI: 10.1109/ISSCC.2003.1234274
K. Findlater, R. Henderson, D. Baxter, J. Hurwitz, L. Grant, Y. Cazaux, F. Roy, D. Hérault, Y. Marcellier
{"title":"SXGA pinned photodiode CMOS image sensor in 0.35 /spl mu/m technology","authors":"K. Findlater, R. Henderson, D. Baxter, J. Hurwitz, L. Grant, Y. Cazaux, F. Roy, D. Hérault, Y. Marcellier","doi":"10.1109/ISSCC.2003.1234274","DOIUrl":"https://doi.org/10.1109/ISSCC.2003.1234274","url":null,"abstract":"A 30 frames/s SXGA 5.6 /spl mu/m pinned photodiode pixel column parallel CMOS image sensor achieves 340 /spl mu/V noise floor and 40 pA/cm/sup 2/ dark current. Performance is limited by pixel 1/f noise, not by the ADC noise floor of 140 /spl mu/V. The column ADC memory employs a custom DRAM to save area. The sensor utilizes a 0.35 /spl mu/m 1P 3M CMOS process.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"454 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129499504","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 30
A column-based pixel-gain-adaptive CMOS image sensor for low-light-level imaging 一种用于微光成像的基于列的像素增益自适应CMOS图像传感器
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI: 10.1109/ISSCC.2003.1234277
S. Kawahito, M. Sakakibara, D. Handoko, N. Nakamura, H. Satoh, M. Higashi, K. Mabuchi, H. Sumi
{"title":"A column-based pixel-gain-adaptive CMOS image sensor for low-light-level imaging","authors":"S. Kawahito, M. Sakakibara, D. Handoko, N. Nakamura, H. Satoh, M. Higashi, K. Mabuchi, H. Sumi","doi":"10.1109/ISSCC.2003.1234277","DOIUrl":"https://doi.org/10.1109/ISSCC.2003.1234277","url":null,"abstract":"A 0.25 /spl mu/m technology CMOS image sensor employs a 4.2 /spl mu/m pitch pinned-photodiode pixel. A column amplifier and digital domain processing reduce the fixed pattern noise to 55 /spl mu/V. The saturation voltage is 1 V with a 2.5 V supply voltage, and the dynamic range is 69 dB.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127627838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 39
A 1.5V 1.7ns 4k /spl times/ 32 SRAM with a fully-differential auto-power-down current sense amplifier 一个1.5V 1.7ns 4k /spl倍/ 32 SRAM，带有全差分自动下电电流检测放大器
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI: 10.1109/ISSCC.2003.1234387
B. Wicht, Jean-Yves Larguier, D. Schmitt-Landsiedel
{"title":"A 1.5V 1.7ns 4k /spl times/ 32 SRAM with a fully-differential auto-power-down current sense amplifier","authors":"B. Wicht, Jean-Yves Larguier, D. Schmitt-Landsiedel","doi":"10.1109/ISSCC.2003.1234387","DOIUrl":"https://doi.org/10.1109/ISSCC.2003.1234387","url":null,"abstract":"A fully-differential current sense amplifier operates as low as 0.7V, automatically turns off after reading and features fast precharge. An implementation of a 1.5V 4k /spl times/ 32 dual-port SRAM macro in a 130nm CMOS process achieves an access time of 1.7ns.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132354524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Ultra-high resolution image capturing and processing for digital cinematography 用于数字电影摄影的超高分辨率图像捕获和处理
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI: 10.1109/ISSCC.2003.1234249
A. Theuwissen, J. Coghill, L. Ion, F. Shu, H. Siefken, C. Smith
{"title":"Ultra-high resolution image capturing and processing for digital cinematography","authors":"A. Theuwissen, J. Coghill, L. Ion, F. Shu, H. Siefken, C. Smith","doi":"10.1109/ISSCC.2003.1234249","DOIUrl":"https://doi.org/10.1109/ISSCC.2003.1234249","url":null,"abstract":"The influence of digital cinematography on silicon ICs is described with primary emphasis on the image capturing function. The CCD imager combines 8 Mpixels resolution, up to 60 frames/s and a linear dynamic range of 12 b. The imager generates 720 MB/s which needs to be further processed in the camera.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130052743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A 48-860MHz digital cable tuner IC with integrated RF and IF selectivity 一个48-860MHz的数字电缆调谐器集成射频和中频选择性
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI: 10.1109/ISSCC.2003.1234379
J. V. Sinderen, F. Seneschal, Eduard Stikvoort, Faycal Mounaim, Marc Notten, H. Brekelmans, Olivier Crand, Fateh Singh, M. Bernard, Vincent Fillatre, Anton Tombeur
{"title":"A 48-860MHz digital cable tuner IC with integrated RF and IF selectivity","authors":"J. V. Sinderen, F. Seneschal, Eduard Stikvoort, Faycal Mounaim, Marc Notten, H. Brekelmans, Olivier Crand, Fateh Singh, M. Bernard, Vincent Fillatre, Anton Tombeur","doi":"10.1109/ISSCC.2003.1234379","DOIUrl":"https://doi.org/10.1109/ISSCC.2003.1234379","url":null,"abstract":"A single-chip digital cable tuner with an active splitter for cable data modems and set-top boxes is realized in a 0.5/spl mu/m, 30GHz BiCMOS technology. The IC employs a single down-conversion, low-IF architecture and can receive signals in the 48-860MHz range. Fully integrated selectivity is obtained in combination with a channel decoder. Power consumption is 1.5W with a 3.3V supply.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132945355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 58
A 0.9 V 0.5 /spl mu/W CMOS single-switched-op-amp signal-conditioning system for pacemaker applications 用于起搏器应用的0.9 V 0.5 /spl mu/W CMOS单开关运放信号调理系统
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI: 10.1109/ISSCC.2003.1234360
V. Cheung, H. Luong
{"title":"A 0.9 V 0.5 /spl mu/W CMOS single-switched-op-amp signal-conditioning system for pacemaker applications","authors":"V. Cheung, H. Luong","doi":"10.1109/ISSCC.2003.1234360","DOIUrl":"https://doi.org/10.1109/ISSCC.2003.1234360","url":null,"abstract":"A 0.5 /spl mu/W switched-capacitor signal-conditioning system with integrated switched-op-amp filter and /spl Sigma//spl Delta/ modulator is implemented in a 0.35 /spl mu/m CMOS process. A power-efficient single op-amp architecture employing half-delay SC integrators is utilized for the whole system. Operated from a 0.9 V supply, the system has a dynamic range of 45 dB.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132202157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
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