Journal of Semiconductor Technology and Science最新文献

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Design of an Approximate Adder based on Modified Full Adder and Nonzero Truncation for Machine Learning 基于改进全加法器和非零截断的近似加法器设计
IF 0.4 4区 工程技术
Journal of Semiconductor Technology and Science Pub Date : 2023-04-30 DOI: 10.5573/jsts.2023.23.2.138
Hyoju Seo, Hyelin Seok, Jungwon Lee, Youngsun Han, Yongtae Kim
{"title":"Design of an Approximate Adder based on Modified Full Adder and Nonzero Truncation for Machine Learning","authors":"Hyoju Seo, Hyelin Seok, Jungwon Lee, Youngsun Han, Yongtae Kim","doi":"10.5573/jsts.2023.23.2.138","DOIUrl":"https://doi.org/10.5573/jsts.2023.23.2.138","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2023-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78765654","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low Power RF Interface of the Near-field Communications Tag IC for Sensors 传感器近场通信标签IC的低功率射频接口
IF 0.4 4区 工程技术
Journal of Semiconductor Technology and Science Pub Date : 2023-04-30 DOI: 10.5573/jsts.2023.23.2.112
In-Young Lee, D. Im
{"title":"Low Power RF Interface of the Near-field Communications Tag IC for Sensors","authors":"In-Young Lee, D. Im","doi":"10.5573/jsts.2023.23.2.112","DOIUrl":"https://doi.org/10.5573/jsts.2023.23.2.112","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2023-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90988594","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Review of Short-circuit Protection Circuits for SiC MOSFETs SiC mosfet短路保护电路研究进展
IF 0.4 4区 工程技术
Journal of Semiconductor Technology and Science Pub Date : 2023-04-30 DOI: 10.5573/jsts.2023.23.2.128
Seungjik Lee, O. Lee, I. Nam
{"title":"Review of Short-circuit Protection Circuits for SiC MOSFETs","authors":"Seungjik Lee, O. Lee, I. Nam","doi":"10.5573/jsts.2023.23.2.128","DOIUrl":"https://doi.org/10.5573/jsts.2023.23.2.128","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2023-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75269423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Simple Timing-skew Calibration using Flip-flops for Time-interleaved ADCs 用触发器对时间交错adc进行简单的时序倾斜校准
IF 0.4 4区 工程技术
Journal of Semiconductor Technology and Science Pub Date : 2023-04-30 DOI: 10.5573/jsts.2023.23.2.89
Ji-Hun Lim, Sang-Gyu Park
{"title":"A Simple Timing-skew Calibration using Flip-flops for Time-interleaved ADCs","authors":"Ji-Hun Lim, Sang-Gyu Park","doi":"10.5573/jsts.2023.23.2.89","DOIUrl":"https://doi.org/10.5573/jsts.2023.23.2.89","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2023-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73415785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Low-power DRAM Controller ASIC with a 36% Reduction in Average Active Power by Increasing On-die Termination Resistance 一种低功耗DRAM控制器ASIC,通过增加片上终止电阻使平均有功功率降低36%
IF 0.4 4区 工程技术
Journal of Semiconductor Technology and Science Pub Date : 2023-04-30 DOI: 10.5573/jsts.2023.23.2.98
Won-Cheol Lee, Ho-Jun Kim, Hong-June Park
{"title":"A Low-power DRAM Controller ASIC with a 36% Reduction in Average Active Power by Increasing On-die Termination Resistance","authors":"Won-Cheol Lee, Ho-Jun Kim, Hong-June Park","doi":"10.5573/jsts.2023.23.2.98","DOIUrl":"https://doi.org/10.5573/jsts.2023.23.2.98","url":null,"abstract":"—A low-power DRAM controller ASIC is proposed for point-to-point interconnects such as deep learning applications. The termination resistance of the DRAM controller is increased to 160 Ω and infinity during the write and read modes, respectively, to reduce power consumption with no transmission errors. Short-reach interconnects of 25 mm DQ/DQS lines are used to avoid signal integrity issues. The proposed DRAM controller is implemented in a 65 nm process with an active area of 1.64 mm 2 , 16 DQ 8 Gb configuration, and a data rate of 800 Mbps per DQ pin. The DRAM interface using the proposed controller and a commercial DDR3 DRAM chip consumes 379 mW on average; this is 64% of the power with the default termination of the JEDEC standard. Derived equations for the TX and RX current of the DRAM interface reveals that the TX current of a clock signal is minimized when the time of flight of the PCB channel is integer multiples of the half period of the clock signal with large TX and RX terminations.","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2023-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74085555","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Electrical Performance Depending on the Grain Boundary-location in the Multiple Nanosheet Tunneling Field-effect Transistor based on the Poly-Si 基于多晶硅的多纳米片隧道场效应晶体管的电性能与晶界位置的关系
IF 0.4 4区 工程技术
Journal of Semiconductor Technology and Science Pub Date : 2023-02-28 DOI: 10.5573/jsts.2023.23.1.8
G. Kang, I. Kang, Sang-Ho Lee, Jin Park, S. Min, G. Kim, J. Heo, Jaewon Jang, J. Bae, Sin‐Hyung Lee
{"title":"Electrical Performance Depending on the Grain Boundary-location in the Multiple Nanosheet Tunneling Field-effect Transistor based on the Poly-Si","authors":"G. Kang, I. Kang, Sang-Ho Lee, Jin Park, S. Min, G. Kim, J. Heo, Jaewon Jang, J. Bae, Sin‐Hyung Lee","doi":"10.5573/jsts.2023.23.1.8","DOIUrl":"https://doi.org/10.5573/jsts.2023.23.1.8","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2023-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85868611","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 0.9 - 1.5 GHz CMOS UWB Radar IC for Through the Wall Human Detection 一种用于穿墙人体检测的0.9 - 1.5 GHz CMOS超宽带雷达IC
IF 0.4 4区 工程技术
Journal of Semiconductor Technology and Science Pub Date : 2023-02-28 DOI: 10.5573/jsts.2023.23.1.56
B. Seo, Gu Jung, Sunghun Jung, Dong-Min Seol, Sungmoon Chung, Y. Eo
{"title":"A 0.9 - 1.5 GHz CMOS UWB Radar IC for Through the Wall Human Detection","authors":"B. Seo, Gu Jung, Sunghun Jung, Dong-Min Seol, Sungmoon Chung, Y. Eo","doi":"10.5573/jsts.2023.23.1.56","DOIUrl":"https://doi.org/10.5573/jsts.2023.23.1.56","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2023-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85518549","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Development of Organic Thin-film Transistors on a Biocompatible Parylene-C Substrate 生物相容性聚苯二烯- c衬底上有机薄膜晶体管的研制
IF 0.4 4区 工程技术
Journal of Semiconductor Technology and Science Pub Date : 2023-02-28 DOI: 10.5573/jsts.2023.23.1.1
K. Kim, Sookyeong Kim, Ah-Hyun Hong, Yoojeong Ko, Hyowon Jang, Hyeok-Don Kim, Dong-Wook Park
{"title":"Development of Organic Thin-film Transistors on a Biocompatible Parylene-C Substrate","authors":"K. Kim, Sookyeong Kim, Ah-Hyun Hong, Yoojeong Ko, Hyowon Jang, Hyeok-Don Kim, Dong-Wook Park","doi":"10.5573/jsts.2023.23.1.1","DOIUrl":"https://doi.org/10.5573/jsts.2023.23.1.1","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2023-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76030346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
1T DRAM with Raised SiGe Quantum Well for Sensing Margin Improvement 提高SiGe量子阱的1T DRAM传感裕度改善
IF 0.4 4区 工程技术
Journal of Semiconductor Technology and Science Pub Date : 2023-02-28 DOI: 10.5573/jsts.2023.23.1.64
Si-Won Lee, Seongjae Cho, I. Cho, Garam Kim
{"title":"1T DRAM with Raised SiGe Quantum Well for Sensing Margin Improvement","authors":"Si-Won Lee, Seongjae Cho, I. Cho, Garam Kim","doi":"10.5573/jsts.2023.23.1.64","DOIUrl":"https://doi.org/10.5573/jsts.2023.23.1.64","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2023-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78322128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Feasibility Study of Monitoring of Particle Generation in Plasma Etching Process by Plasma Impedance Measurement 等离子体阻抗测量监测等离子体蚀刻过程中粒子生成的可行性研究
IF 0.4 4区 工程技术
Journal of Semiconductor Technology and Science Pub Date : 2023-02-28 DOI: 10.5573/jsts.2023.23.1.50
Y. Kasashima, T. Tabaru, T. Ikeda
{"title":"Feasibility Study of Monitoring of Particle Generation in Plasma Etching Process by Plasma Impedance Measurement","authors":"Y. Kasashima, T. Tabaru, T. Ikeda","doi":"10.5573/jsts.2023.23.1.50","DOIUrl":"https://doi.org/10.5573/jsts.2023.23.1.50","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2023-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75290192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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