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2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)最新文献

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Effect of charge imbalance and edge structure on the reverse recovery waveform in superjunction body diode 电荷不平衡和边缘结构对超结体二极管反向恢复波形的影响
2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2018-05-01 DOI: 10.1109/ISPSD.2018.8393632
Daisuke Arai, Mizue Yamaji, K. Murakami, Masaaki Honda, S. Kunori
{"title":"Effect of charge imbalance and edge structure on the reverse recovery waveform in superjunction body diode","authors":"Daisuke Arai, Mizue Yamaji, K. Murakami, Masaaki Honda, S. Kunori","doi":"10.1109/ISPSD.2018.8393632","DOIUrl":"https://doi.org/10.1109/ISPSD.2018.8393632","url":null,"abstract":"The reverse recovery characteristics of the body diode in Si superjunction (SJ) have been investigated at the fixed condition of dif/dt = 100A/μsec. It was found that the recovery waveforms are much affected by the charge imbalance (CIB) and by the edge termination structure. N-type rich CIB and the support by the current through the edge structure result in softer recovery. When local lifetime control by 3He2+ ion irradiation is performed, the SJ diode with the defect peak at half the depth of the P-column showed softer recovery than the one with the defect peak at the bottom of the P-column. These results indicate that the conductivity modulation carriers remain around the bottom of the P-column during the reverse recovery transient and to control the elimination rate of the remaining carriers is important to achieve soft and fast recovery for SJ diodes. Understanding of these transient phenomena will provide a guideline for realizing general use of SJ-MOSFETs for inverters.","PeriodicalId":166809,"journal":{"name":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128563086","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Impact of self-heating effect in hot carrier injection modeling 热载体注射建模中自热效应的影响
2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2018-05-01 DOI: 10.1109/ISPSD.2018.8393666
Dong Seup Lee, D. Varghese, A. Sonnet, J. Joh, A. Venugopal, S. Krishnan
{"title":"Impact of self-heating effect in hot carrier injection modeling","authors":"Dong Seup Lee, D. Varghese, A. Sonnet, J. Joh, A. Venugopal, S. Krishnan","doi":"10.1109/ISPSD.2018.8393666","DOIUrl":"https://doi.org/10.1109/ISPSD.2018.8393666","url":null,"abstract":"This paper studies the impact of self-heating effects in DC-based Hot Carrier Injection (HCI) modeling in power LDMOS devices. Continuous and large power consumption under the on-state DC stress can result in substantial increase in device temperature, which potentially causes non-negligible error in the HCI modeling. The issue is systematically investigated and verified through various approaches such as comparison of HCI degradation between the devices with different voltage ratings and finger widths, junction temperature estimation with 3D thermal simulation, and pulse-based stress modeling. In addition, it is shown that reliability projection methodology based on the actual circuit waveforms can be more immune to the potential errors caused by the self-heating effect in the conventional DC-based modeling.","PeriodicalId":166809,"journal":{"name":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117131013","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
SiC trench IGBT with diode-clamped p-shield for oxide protection and enhanced conductivity modulation SiC沟槽IGBT二极管箝位p屏蔽氧化物保护和增强电导率调制
2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2018-05-01 DOI: 10.1109/ISPSD.2018.8393690
Jin Wei, Meng Zhang, Huaping Jiang, S. To, Sunghan Kim, Jun-Youn Kim, K. J. Chen
{"title":"SiC trench IGBT with diode-clamped p-shield for oxide protection and enhanced conductivity modulation","authors":"Jin Wei, Meng Zhang, Huaping Jiang, S. To, Sunghan Kim, Jun-Youn Kim, K. J. Chen","doi":"10.1109/ISPSD.2018.8393690","DOIUrl":"https://doi.org/10.1109/ISPSD.2018.8393690","url":null,"abstract":"In this paper, a diode-clamped p-shield is proposed as a feasible approach for SiC trench IGBT. The introduction of the p-shield effectively suppresses the high electric field in the gate oxide around the trench corner, which is a notorious feature for SiC trench gate devices. Additionally, the p-shield also results in a reduced Crss and thus better switching characteristics. The traditional grounded p-shield (widely adopted in SiC trench MOSFETs), however, significantly reduces the electron/hole density near the emitter side of the SiC trench IGBT. The diode-clamped p-shield structure proposed in this paper successfully solves this issue, since the potential of the p-shield in the on-state is elevated to near the turn-on voltage of the diode, and thus the extraction of holes from the p-shield is suppressed. Therefore, the proposed SiC trench IGBT with a diode-clamped p-shield reduces the high oxide field, improves the switching characteristics and maintains a low Kon simultaneously.","PeriodicalId":166809,"journal":{"name":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115661493","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Enhanced breakdown voltage and low inductance of All-SiC module 提高了全sic模块的击穿电压和低电感
2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2018-05-01 DOI: 10.1109/ISPSD.2018.8393702
M. Hori, Y. Hinata, K. Taniguchi, Y. Ikeda, T. Yamazaki
{"title":"Enhanced breakdown voltage and low inductance of All-SiC module","authors":"M. Hori, Y. Hinata, K. Taniguchi, Y. Ikeda, T. Yamazaki","doi":"10.1109/ISPSD.2018.8393702","DOIUrl":"https://doi.org/10.1109/ISPSD.2018.8393702","url":null,"abstract":"SiC devices are expected to be used in fields that require in high voltage fields from 3kV to 10kV such as railways, and high reliability such as hybrid vehicles and electric vehicles. And it is also expected to realize high current to expand the application range. This paper presents the packaging technologies for enhanced breakdown voltage and low inductance corresponding to high current of All-SiC modules.","PeriodicalId":166809,"journal":{"name":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125400757","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Self terminating lateral-vertical hybrid super-junction FET that breaks RDS.A — Charge balance trade-off window 突破RDS的自终止横向垂直杂化超结场效应管。A -电荷平衡权衡窗口
2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2018-05-01 DOI: 10.1109/ISPSD.2018.8393625
K. Padmanabhan, L. Guan, M. Bobde, Sik Lui, A. Bhalla, H. Yilmaz, Lei Zhang
{"title":"Self terminating lateral-vertical hybrid super-junction FET that breaks RDS.A — Charge balance trade-off window","authors":"K. Padmanabhan, L. Guan, M. Bobde, Sik Lui, A. Bhalla, H. Yilmaz, Lei Zhang","doi":"10.1109/ISPSD.2018.8393625","DOIUrl":"https://doi.org/10.1109/ISPSD.2018.8393625","url":null,"abstract":"In this paper, we present a novel lateral/vertical hybrid super-junction structure that breaks the fundamental trade-off between the Rds.A and Charge imbalance window for a Super-Junction MOSFET. This device structure can continue the scaling of Superjunction MOSFET well below 10mΩ.cm2 with good manufacturability window. Methods of scaling the Blocking Voltage and Rds.A are also discussed for this hybrid device structure. This device structure also offers an optional drain electrode on the top surface, if needed for co-packaging with other chips.","PeriodicalId":166809,"journal":{"name":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"488 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126011675","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
High avalanche capability specific diode part structure of RC-IGBT based upon CSTBT™ 基于CSTBT™的RC-IGBT高雪崩性能专用二极管部分结构
2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2018-05-01 DOI: 10.1109/ISPSD.2018.8393620
S. Soneda, Shinya Akao, Tetsuo Takahashi, A. Furukawa
{"title":"High avalanche capability specific diode part structure of RC-IGBT based upon CSTBT™","authors":"S. Soneda, Shinya Akao, Tetsuo Takahashi, A. Furukawa","doi":"10.1109/ISPSD.2018.8393620","DOIUrl":"https://doi.org/10.1109/ISPSD.2018.8393620","url":null,"abstract":"A thin RC-IGBT is facing to a difficulty of certifying a stable BV characteristic among the three portions, i.e. IGBT (pnp), Diode (pin) and termination (pnp too). We propose a high avalanche capability specific Diode part structure of the RC-IGBT based upon CSTBT™. This stabilization of the BV characteristic was realized by adjusting the BV balance of three portions described above. One of the successful approach was lowering the Diode's BV by widening Diode's trench pitch (WDTP).","PeriodicalId":166809,"journal":{"name":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131183005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Application of CS-MCT in DC solid state circuit breaker (SSCB) CS-MCT在直流固态断路器中的应用
2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2018-05-01 DOI: 10.1109/ISPSD.2018.8393671
Wanjun Chen, H. Tao, Chao Liu, Yawei Liu, Chengfang Liu, Jie Liu, Yijun Shi, Qi Zhou, Zhaoji Li, Bo Zhang
{"title":"Application of CS-MCT in DC solid state circuit breaker (SSCB)","authors":"Wanjun Chen, H. Tao, Chao Liu, Yawei Liu, Chengfang Liu, Jie Liu, Yijun Shi, Qi Zhou, Zhaoji Li, Bo Zhang","doi":"10.1109/ISPSD.2018.8393671","DOIUrl":"https://doi.org/10.1109/ISPSD.2018.8393671","url":null,"abstract":"In this work, the application of cathode-short MOS-controlled thyristor (CS-MCT) in DC solid state circuit breakers (SSCB) is evaluated. Firstly, static and dynamic characteristics of CS-MCT are presented, and a low on-state resistance combined with a high surge current capability makes CS-MCT a promising candidate for SSCB. Furthermore, fault interruption process of SSCB based on CS-MCT is demonstrated via TCAD simulation as well as experiment. According to the research, SSCB based on CS-MCT can achieve a high fault current interruption capability once the mis-triggering of internal thyristor is effectively suppressed. And a contradictory relationship between energy loss and interruption capability of the SSCB is also found, which implies a trade-off design should be taken into consideration.","PeriodicalId":166809,"journal":{"name":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133955540","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Analysis of reverse temperature dependent switching-off behavior of ultra-thin fieldstop IGBTs 超薄场阻igbt的反向温度相关关断行为分析
2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2018-05-01 DOI: 10.1109/ISPSD.2018.8393631
So-youn Kim, Euntaek Kim, Jiho Jeon, Jinyoung Jung, Soo-Seong Kim, Kwang-Hoon Oh, C. Yun
{"title":"Analysis of reverse temperature dependent switching-off behavior of ultra-thin fieldstop IGBTs","authors":"So-youn Kim, Euntaek Kim, Jiho Jeon, Jinyoung Jung, Soo-Seong Kim, Kwang-Hoon Oh, C. Yun","doi":"10.1109/ISPSD.2018.8393631","DOIUrl":"https://doi.org/10.1109/ISPSD.2018.8393631","url":null,"abstract":"For trench FS IGBTs having different thickness of drift layers, the trade-off performances between conduction loss and switching loss have been evaluated. At switching off mode, it was observed that turn-off loss increases with decrease in temperature, which appears at high current switching with high collector-emitter bias. This temperature dependency of switching-off behavior is unusual and has not been fully investigated before. In this research, we analyze underlying physical mechanisms for the reverse temperature dependency of switching-off behavior using device simulation as well as extensive switching measurements. In addition, we propose a new concept of switching SOA of ultra-thin FS IGBTs, identifying switching conditions which lead to abnormal temperature dependency.","PeriodicalId":166809,"journal":{"name":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131085805","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Non-full depletion mode and its experimental realization of the lateral superjunction 横向超结的非完全耗尽模式及其实验实现
2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2018-05-01 DOI: 10.1109/ISPSD.2018.8393706
Wentong Zhang, S. Pu, Chunlan Lai, L. Ye, Shikang Cheng, Sen Zhang, Boyong He, Zhuo Wang, X. Luo, M. Qiao, Zhaoji Li, Bo Zhang
{"title":"Non-full depletion mode and its experimental realization of the lateral superjunction","authors":"Wentong Zhang, S. Pu, Chunlan Lai, L. Ye, Shikang Cheng, Sen Zhang, Boyong He, Zhuo Wang, X. Luo, M. Qiao, Zhaoji Li, Bo Zhang","doi":"10.1109/ISPSD.2018.8393706","DOIUrl":"https://doi.org/10.1109/ISPSD.2018.8393706","url":null,"abstract":"To realize the minimum specific on-resistance Ron, sp of the lateral superjunction (SJ) devices, the low resistance characteristic of the SJ should be adequately used and the adverse influence of substrate-assisted depletion (SAD) effect on the breakdown voltage VB should be eliminated. From our previous equivalent substrate (ES) model, the SAD effect is completely suppressed if the ES is optimized. In this paper, the balanced symmetric SJ satisfying the optimized ES condition is defined as the ES-SJ. Based on the ES-SJ concept, the non-full depletion (NFD) mode of the lateral SJ is proposed and experimentally realized for the first time. In the experiments, the optimized ES is obtained by a linearly doped charge compensation layer (CCL) with a field plate covering the full drift region and the NFD SJ is implemented with a narrow width of 0.8 μm by implanting the SJ region thrice. The measured results exhibit a Ron, sp of 30.9 mΩ·cm2 with a VB of 477 V, which obtains a reduction in Ron, sp by 67.8% when compared with other SJ devices under the similar VB.","PeriodicalId":166809,"journal":{"name":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133290044","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Switching performance analysis of GaN OG-FET using TCAD device-circuit-integrated model 用TCAD器件电路集成模型分析GaN ogg - fet的开关性能
2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2018-05-01 DOI: 10.1109/ISPSD.2018.8393639
D. Ji, Wenwen Li, S. Chowdhury
{"title":"Switching performance analysis of GaN OG-FET using TCAD device-circuit-integrated model","authors":"D. Ji, Wenwen Li, S. Chowdhury","doi":"10.1109/ISPSD.2018.8393639","DOIUrl":"https://doi.org/10.1109/ISPSD.2018.8393639","url":null,"abstract":"This paper presents the superior switching performance of the in-situ Oxide-GaN interlayer FET (OG-FET) obtained by modeling a 1.4 kV/2.2 mΩ□cm2 device fabricated by the authors [1]. Based on the parameters extracted from fabricated devices, an accurate 2D physics-based device model was developed. Using the device-circuit-integrated model built in Silvaco's MixedMode platform [2], we evaluated the switching performance of the OG-FET in 1) a double-pulse switch circuit, and 2) in a 200 V : 800 V boost converter as well. The OG-FET showed a remarkably low device figure-of-merit (Ron·Qgd) of 1275 mΩ□nC. Our results indicate that our recently fabricated large area GaN OG-FET has the potential of attaining higher efficiencies and also enabling MHz range conversions.","PeriodicalId":166809,"journal":{"name":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"74 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133391333","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
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