{"title":"Linking university research to microelectronics manufacturing: Harris Semiconductor's approach to technology transfer","authors":"T. Haycock","doi":"10.1109/UGIM.1991.148110","DOIUrl":"https://doi.org/10.1109/UGIM.1991.148110","url":null,"abstract":"Harris Semiconductor has been successful in its technology transfer programs with universities, and was recently recognized at Semiconductor Research Corporation's (SRC's) TECHCON '90 Conference as having the industry's best mentor program. The author explores methodologies utilized within Harris, with emphasis on its SRC mentor program and summer intern program, each of which targets graduate-level research programs at US universities. The initiation, implementation, and results from both programs are discussed in detail, with emphasis given to manufacturing technology projects. Several case studies explored to illustrate the breadth of applications and technologies that are being addressed.<<ETX>>","PeriodicalId":163406,"journal":{"name":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127775187","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Clearinghouse for undergraduate microelectronics education: what have we learned?","authors":"B. MacDonald, D. Cunningham, R. Gold","doi":"10.1109/UGIM.1991.148113","DOIUrl":"https://doi.org/10.1109/UGIM.1991.148113","url":null,"abstract":"The Massachusetts Microelectronics Center (M/sup 2/C), with support from the National Science Foundation, has established the Clearinghouse for Undergraduate Microelectronics Education (CUME) to support VLSI education programs at universities throughout the United States. The primary objective of CUME has been to increase the number of microelectronics education programs in the United States via a rapid start-up or bootstrap method. One year into the program, 20 universities have joined, and M/sup 2/C has identified several important trends in VLSI education as well as issues related to providing multi-platform software support to remote sites. The authors discuss those trends and issues, making some recommendations for future national programs with an emphasis on shared resources and cooperation with industry.<<ETX>>","PeriodicalId":163406,"journal":{"name":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116595596","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Lee, B.S.S. Or, N. Hwang, L. Forbes, H. Haddad, W. Richling
{"title":"Thermal self-limiting effects in the long-term AC stress on n-channel LDD MOSFETs","authors":"M. Lee, B.S.S. Or, N. Hwang, L. Forbes, H. Haddad, W. Richling","doi":"10.1109/UGIM.1991.148129","DOIUrl":"https://doi.org/10.1109/UGIM.1991.148129","url":null,"abstract":"A model of lightly doped drain n-MOSFET degradation in drain current under long-term AC use conditions which includes a self-limiting effect in the hot-electron induced device degradation is proposed for lifetime projections. Experimental results on LDD n-MOSFETs (W=50 mu m) are presented which show the maximum drain current degradation as a function of the average substrate current under the various AC stress and use conditions (f=0.4 MHz, 1 MHz, 2 MHz, and 4 MHz) for different drawn gate lengths. The maximum drain current degradations were 0.3% mu A, 0.2%/ mu A, and 0.15%/ mu A of the substrate current for drawn gate lengths of 0.8 mu m, 1.0 mu m, and 1.5 mu m, respectively, at an ambient temperature of 25 degrees C. The proposed model also includes and predicts the strong temperature dependence.<<ETX>>","PeriodicalId":163406,"journal":{"name":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116203202","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Polycrystalline diamond device processing","authors":"C. Ellis, R. Ramesham, T.A. Roppel","doi":"10.1109/UGIM.1991.148154","DOIUrl":"https://doi.org/10.1109/UGIM.1991.148154","url":null,"abstract":"1 The authors describe processes developed for the fabrication of accelerometers, flow sensors, and microchannel cooling structures, using selectively deposited films and silicon micromachining. The diamond films were grown using an ASTeX high-pressure microwave chemical vapor deposition reactor at 950+/-25 degrees C with a growth rate of approximately 1 mu m/h. It was found that polycrystalline diamond films can be used to fabricate various microstructures. A technique for doping diamond films is shown to lower the resistance of the as-grown films.<<ETX>>","PeriodicalId":163406,"journal":{"name":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131563873","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Bringing high technology to low technology industry","authors":"K. Perusich, G. Michael","doi":"10.1109/UGIM.1991.148112","DOIUrl":"https://doi.org/10.1109/UGIM.1991.148112","url":null,"abstract":"The Indiana Microelectronics Center, using a variety of resources, was created to provide proactive assistance to Indiana companies in order to enhance their competitive position through the application of microelectronics, and in particular, ASICs (application-specific integrated circuits). A client partnership with the Indiana Microelectronics Center to complete an ASIC design generally involves three steps: design, and product implementation. The Center provides a variety of resources and levels of assistance to clients. These resources encompass hardware and software design tools, and experienced ASIC design staff associations with over 30 ASIC device manufacturers. A variety of other means and methods are available for ASIC design assistance. Two approaches are discussed: completing the design internally, and developing the application through a design center. These centers can quickly complete a design for a company, but most require the customer to have a complete circuit specification.<<ETX>>","PeriodicalId":163406,"journal":{"name":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","volume":"8 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120920902","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A wafer scale programmable systolic data processor","authors":"D. Landis, J. Yoder, D. Whittaker, T. Dobbins","doi":"10.1109/UGIM.1991.148160","DOIUrl":"https://doi.org/10.1109/UGIM.1991.148160","url":null,"abstract":"The authors describe the programmable systolic data processor (PSDP). The PSDP will enhance US Department of Defense (DoD) mission capabilities by extending signal and data processing speed/performance while reducing system size, weight, and power consumption. The characteristics of this architecture which make it opportune for building as a wafer-scale system include broad homogeneity, ease of redundancy, and limited physical interconnect bandwidth of wafer-scale integration (WSI) using a robust programmable systolic array processing architecture. Thus, it will provide unique onboard processing capabilities for DoD missions.<<ETX>>","PeriodicalId":163406,"journal":{"name":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121473458","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Nishida, S. Thompson, J. Kavalieros, Y. Lu, M. Han
{"title":"Characterization of ULSI gate oxide reliability using substrate and channel electron injection stresses","authors":"T. Nishida, S. Thompson, J. Kavalieros, Y. Lu, M. Han","doi":"10.1109/UGIM.1991.148127","DOIUrl":"https://doi.org/10.1109/UGIM.1991.148127","url":null,"abstract":"A hot electron reliability characterization methodology has been developed to separate the geometry and process related degradations using BIMOS (bipolar-MOS) and SMOSC (sourced MOS capacitor) tests structures which uniformly inject the hot electrons from the substrate into the oxide. In both test structures, the gate oxide current is independently controlled from the oxide electric field. The uniform injection into the gate oxide obtained in the BiMOS DC and the SMOSC AC (pulsed) substrate injection techniques facilitates rapid evaluation of gate oxide quality in the manufacturing environment independent of the drain doping profile.<<ETX>>","PeriodicalId":163406,"journal":{"name":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123591929","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Schottky barrier enhancement in Ni/Al layer-by-layer contacts to n-GaAs","authors":"A. K. Kulkarni, J. Lu","doi":"10.1109/UGIM.1991.148153","DOIUrl":"https://doi.org/10.1109/UGIM.1991.148153","url":null,"abstract":"Electron-beam deposited Ni/Al bimetallic, Ni and Al single-metallic contacts to chemically etched <100> oriented n-type GaAs were studied. These samples were electrically characterized to determine the barrier heights, ideality factors, and doping concentrations. Barrier heights determined from I-V measurements using thermionic emission model yielded larger ideality factors, indicating that thermionic field emission model is more applicable for these contacts. The discrepancies in the barrier height data from I-V and C-V measurements are explained. Chemical analysis using an Auger electron spectrometer showed contamination at the interfaces of annealed samples. The results on single metallic contacts agreed quite well with published data. The authors show the importance of the bimetallic contacts by comparing the electrical properties of Ni/Al Schottky contacts with those made by Ni or Al alone under similar fabrication and processing conditions.<<ETX>>","PeriodicalId":163406,"journal":{"name":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127950361","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Effect of geometry on the strain in electronic packages","authors":"A. Voloshin, P. Tsao","doi":"10.1109/UGIM.1991.148159","DOIUrl":"https://doi.org/10.1109/UGIM.1991.148159","url":null,"abstract":"Due to mismatch in the coefficients of thermal expansion of the components of an electronic package, mechanical strains are induced which may cause package failure under thermal load. An experimental method of fractional fringe Moire interferometry enhanced by digital image processing was used to investigate those strains. This technique is a full field displacement measurement tool possessing high sensitivity and excellent spatial resolution. Therefore, the relatively small regions, such as chip corners, which are thought to be high strain concentration zones, were easily examined. Several packages which had chips of different sizes were investigated. The resulting Moire patterns were recorded and analyzed. The results revealed that the mechanical strains which are due to mismatch in the coefficients of thermal expansion of the chip, leadframe, and encapsulant are on the order of thousands microstrains and the strains in the long chip package are lower than those in the package with a short chip specimen at 90 degrees C.<<ETX>>","PeriodicalId":163406,"journal":{"name":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","volume":"510 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127042234","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Database management for the self-directed work team (IC fabrication)","authors":"S. Titus, M. Stebbins","doi":"10.1109/UGIM.1991.148138","DOIUrl":"https://doi.org/10.1109/UGIM.1991.148138","url":null,"abstract":"The authors describe a management organizational change at Harris Semiconductor that utilizes self-directed work teams. A major obstacle to the implementation was the inability of the management organization to supply the work teams with appropriate data to self-manage their area of responsibility. The need for information at the production-worker level led to the creation of a team information system (TIS) function. This function was created in conjunction with other changes in the support structure of the fab. The organizational structure was designed to supply the self-directed work teams with improved communication over the traditional management pyramid. The TIS function was a vital ingredient in this effort for improved communication.<<ETX>>","PeriodicalId":163406,"journal":{"name":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133469123","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}