M. Lee, B.S.S. Or, N. Hwang, L. Forbes, H. Haddad, W. Richling
{"title":"n沟道LDD mosfet长期交流应力的热自限效应","authors":"M. Lee, B.S.S. Or, N. Hwang, L. Forbes, H. Haddad, W. Richling","doi":"10.1109/UGIM.1991.148129","DOIUrl":null,"url":null,"abstract":"A model of lightly doped drain n-MOSFET degradation in drain current under long-term AC use conditions which includes a self-limiting effect in the hot-electron induced device degradation is proposed for lifetime projections. Experimental results on LDD n-MOSFETs (W=50 mu m) are presented which show the maximum drain current degradation as a function of the average substrate current under the various AC stress and use conditions (f=0.4 MHz, 1 MHz, 2 MHz, and 4 MHz) for different drawn gate lengths. The maximum drain current degradations were 0.3% mu A, 0.2%/ mu A, and 0.15%/ mu A of the substrate current for drawn gate lengths of 0.8 mu m, 1.0 mu m, and 1.5 mu m, respectively, at an ambient temperature of 25 degrees C. The proposed model also includes and predicts the strong temperature dependence.<<ETX>>","PeriodicalId":163406,"journal":{"name":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Thermal self-limiting effects in the long-term AC stress on n-channel LDD MOSFETs\",\"authors\":\"M. Lee, B.S.S. Or, N. Hwang, L. Forbes, H. Haddad, W. Richling\",\"doi\":\"10.1109/UGIM.1991.148129\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A model of lightly doped drain n-MOSFET degradation in drain current under long-term AC use conditions which includes a self-limiting effect in the hot-electron induced device degradation is proposed for lifetime projections. Experimental results on LDD n-MOSFETs (W=50 mu m) are presented which show the maximum drain current degradation as a function of the average substrate current under the various AC stress and use conditions (f=0.4 MHz, 1 MHz, 2 MHz, and 4 MHz) for different drawn gate lengths. The maximum drain current degradations were 0.3% mu A, 0.2%/ mu A, and 0.15%/ mu A of the substrate current for drawn gate lengths of 0.8 mu m, 1.0 mu m, and 1.5 mu m, respectively, at an ambient temperature of 25 degrees C. The proposed model also includes and predicts the strong temperature dependence.<<ETX>>\",\"PeriodicalId\":163406,\"journal\":{\"name\":\"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/UGIM.1991.148129\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/UGIM.1991.148129","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Thermal self-limiting effects in the long-term AC stress on n-channel LDD MOSFETs
A model of lightly doped drain n-MOSFET degradation in drain current under long-term AC use conditions which includes a self-limiting effect in the hot-electron induced device degradation is proposed for lifetime projections. Experimental results on LDD n-MOSFETs (W=50 mu m) are presented which show the maximum drain current degradation as a function of the average substrate current under the various AC stress and use conditions (f=0.4 MHz, 1 MHz, 2 MHz, and 4 MHz) for different drawn gate lengths. The maximum drain current degradations were 0.3% mu A, 0.2%/ mu A, and 0.15%/ mu A of the substrate current for drawn gate lengths of 0.8 mu m, 1.0 mu m, and 1.5 mu m, respectively, at an ambient temperature of 25 degrees C. The proposed model also includes and predicts the strong temperature dependence.<>