Proceedings of the Tenth International Conference on Microelectronics (Cat. No.98EX186)最新文献

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A 1.5-V current-mode capacitance multiplier 一个1.5 v电流模式电容倍增器
G. Ferri, S. Pennisi
{"title":"A 1.5-V current-mode capacitance multiplier","authors":"G. Ferri, S. Pennisi","doi":"10.1109/ICM.1998.825555","DOIUrl":"https://doi.org/10.1109/ICM.1998.825555","url":null,"abstract":"In this work the problem of obtaining capacitance values higher than those normally integratable and/or provided by capacitive transducers has been investigated. The solution here proposed consists of a capacitance multiplier made up of a current conveyor and a current operational amplifier which allows accurate capacitance factors up to 100 to be achieved. Moreover, thanks to the use of the current mode approach, low supply voltage operations (profitable in portable sensor systems) are obtained. The whole topology has been designed in a standard 0.5-/spl mu/m CMOS technology with a 1.5-V supply voltage and micropower consumption. SPICE simulations show a good agreement with the expected results and confirm an accurate multiplication factor for capacitances higher than 1 pF.","PeriodicalId":156747,"journal":{"name":"Proceedings of the Tenth International Conference on Microelectronics (Cat. No.98EX186)","volume":"39 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113937015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 37
Electrical characterization of oxide and Si/SiO/sub 2/ interface of irradiated NMOS transistors at low radiation doses 低辐射剂量辐照NMOS晶体管的氧化物和Si/SiO/sub 2/界面的电学特性
B. Djezzar, A. Amrouche, A. Smatti, M. Kachouane
{"title":"Electrical characterization of oxide and Si/SiO/sub 2/ interface of irradiated NMOS transistors at low radiation doses","authors":"B. Djezzar, A. Amrouche, A. Smatti, M. Kachouane","doi":"10.1109/ICM.1998.825582","DOIUrl":"https://doi.org/10.1109/ICM.1998.825582","url":null,"abstract":"N-channel MOSFET's of different dimensions were first irradiated with /sup 60/Co Gamma rays source at several total doses (low doses) and then their gate oxides, SiO/sub 2/ and interfaces, Si/SiO/sub 2/ were characterized by using the standard charge pumping (CP) and the extended standard CP to low frequencies techniques. Both techniques reveal two radiation induced oxide charge traps formation mechanisms, caused by low radiation total doses. Initially, there is a build-up of positive charge in the oxide layer, followed later by diminution of net positive charge (Turn around effect) due to generation of negative charge or/and transformation of positive oxide traps to interface traps. While the interface traps exhibit a linear increase with radiation doses.","PeriodicalId":156747,"journal":{"name":"Proceedings of the Tenth International Conference on Microelectronics (Cat. No.98EX186)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-11-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129605428","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A class AB CMOS fully balanced signal generator AB类CMOS全平衡信号发生器
H. Elwan, M. Ismail
{"title":"A class AB CMOS fully balanced signal generator","authors":"H. Elwan, M. Ismail","doi":"10.1109/ICM.1998.825551","DOIUrl":"https://doi.org/10.1109/ICM.1998.825551","url":null,"abstract":"In this paper a novel single input to fully balanced output circuit (SFC) is proposed. The circuit operates in a class AB mode to achieve low standby power dissipation and high current drive capability. The circuit produces two buffered balanced output signals without requiring common mode feedback circuit. Measurement results from a 1.2 /spl mu/m N-well CMOS chip indicate a bandwidth of 5.5 MHz while driving a 40 pF load with a supply voltage of /spl plusmn/1.5 V. The circuit is capable of supplying more than 3 mA of output current while consuming 1.1 mW of standby power. The THD is less than -55 dB at 1 KHz and the phase error is less than 2/sup a/ for frequencies up to 1 MHz.","PeriodicalId":156747,"journal":{"name":"Proceedings of the Tenth International Conference on Microelectronics (Cat. No.98EX186)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123491976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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