{"title":"Finite automata with time-delay blocks","authors":"K. Chatterjee, T. Henzinger, Vinayak S. Prabhu","doi":"10.1145/2380356.2380370","DOIUrl":"https://doi.org/10.1145/2380356.2380370","url":null,"abstract":"The notion of delays arises naturally in many computational models, such as, in the design of circuits, control systems, and dataflow languages. In this work, we introduce automata with delay blocks (ADBs), extending finite state automata with variable time delay blocks, for deferring individual transition output symbols, in a discrete-time setting. We show that the ADB languages strictly subsume the regular languages, and are incomparable in expressive power to the context-free languages. We show that ADBs are closed under union, concatenation and Kleene star, and under intersection with regular languages, but not closed under complementation and intersection with other ADB languages. We show that the emptiness and the membership problems are decidable in polynomial time for ADBs, whereas the universality problem is undecidable. Finally we consider the linear-time model checking problem, i.e., whether the language of an ADB is contained in a regular language, and show that the model checking problem is PSPACE-complete.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-07-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130411878","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Vadim Alimguzhin, F. Mari, I. Melatti, Ivano Salvo, E. Tronci
{"title":"On model based synthesis of embedded control software","authors":"Vadim Alimguzhin, F. Mari, I. Melatti, Ivano Salvo, E. Tronci","doi":"10.1145/2380356.2380398","DOIUrl":"https://doi.org/10.1145/2380356.2380398","url":null,"abstract":"Many Embedded Systems are indeed Software Based Control Systems (SBCSs), that is control systems whose controller consists of control software running on a microcontroller device. This motivates investigation on Formal Model Based Design approaches for control software. Given the formal model of a plant as a Discrete Time Linear Hybrid System and the implementation specifications (that is, number of bits in the Analog-to-Digital (AD) conversion) correct-by-construction control software can be automatically generated from System Level Formal Specifications of the closed loop system (that is, safety and liveness requirements), by computing a suitable finite abstraction of the plant.\u0000 With respect to given implementation specifications, the automatically generated code implements a time optimal control strategy (in terms of set-up time), has a Worst Case Execution Time linear in the number of AD bits b, but unfortunately, its size/grows exponentially with respect to b. In many embedded systems, there are severe restrictions on the computational resources (such as memory or computational power) available to microcontroller devices.\u0000 This paper addresses model based synthesis of control software by trading system level non-functional requirements (such us optimal set-up time, ripple) with software non-functional requirements (its footprint). Our experimental results show the effectiveness of our approach: for the inverted pendulum benchmark, by using a quantization schema with 12 bits, the size of the small controller is less than 6% of the size of the time optimal one.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124330356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Buckl, I. Gaponova, Michael Geisinger, A. Knoll, Edward A. Lee
{"title":"Model-based specification of timing requirements","authors":"C. Buckl, I. Gaponova, Michael Geisinger, A. Knoll, Edward A. Lee","doi":"10.1145/1879021.1879053","DOIUrl":"https://doi.org/10.1145/1879021.1879053","url":null,"abstract":"In the past, model-based development focused mainly on functional and structural aspects of the system to be developed. Recently, several approaches to include timing aspects have been suggested. However, these approaches are typically applied in later development phases. Models specifying the requirements with respect to timing without focusing on a specific solution are missing. For example, few models support the specification of the allowed jitter of a system. In this paper, we identify requirements on languages for modeling the desired timing behavior of hard and soft real-time systems by analyzing different application domains. Based on these results, we evaluate existing approaches with respect to their suitability and present a suitable approach. Finally, this paper describes the application of the suggested approach in the context of an example from the automation domain.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114487239","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reducing stack with intra-task threshold priorities in real-time systems","authors":"Gang Yao, G. Buttazzo","doi":"10.1145/1879021.1879036","DOIUrl":"https://doi.org/10.1145/1879021.1879036","url":null,"abstract":"In the design of hard real-time systems, the feasibility of the task set is one of the primary concerns. However, in embedded systems with scarce resources, optimizing resource usage is equally important. In particular, the RAM is highly expensive in terms of chip space, and it heavily impacts the cost of the final product.\u0000 In this paper, we address the problem of reducing the stack usage of a set of sporadic tasks with timing and resource constraints, running on a uni-processor system. With respect to other approaches available in the literature, this work considers each task consisting of a set of functions (or subjobs), each characterized by a maximum stack requirement. This makes it possible to prohibit arbitrary preemptions through a dynamic priority protocol that reduces the overall system stack usage. Resource synchronization is also considered and, an extension of the Stack Resource Policy is presented to arbitrate the access to mutually exclusive resources while reducing the overall stack space. Simulations are performed on randomly generated task sets to evaluate the efficiency of the proposed method with respect to existing approaches.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134128107","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Joseph Porter, G. Hemingway, N. Kottenstette, G. Karsai, J. Sztipanovits
{"title":"Online stability validation using sector analysis","authors":"Joseph Porter, G. Hemingway, N. Kottenstette, G. Karsai, J. Sztipanovits","doi":"10.1145/1879021.1879026","DOIUrl":"https://doi.org/10.1145/1879021.1879026","url":null,"abstract":"Our previous work has explored the use of compositional stabilization techniques for embedded flight control software[9] based on passivity properties of controller components and systems. Zames[21] presented a compositional behavior-bounding technique for evaluating stability of nonlinear systems based on real intervals representing cones (sectors) that bound possible component behaviors. Many innovations in control theory have developed from his insights. We present a novel use of his sector bound theory to validate the stability of embedded control implementations online. The sector analysis can be implemented as a computationally efficient check of stability for different parts of a control design. The advantage of the online application of this technique is that it takes into account software platform effects that impact stability, such as time delays, quantization, and data integrity.\u0000 We present a brief overview of the sector concept, our compatible control design approach, application of the technique to model-based embedded control software design, an example of its use to find design defects, and insights that may be drawn from our investigation so far. In the present work we only consider software (discrete-time) control of nonlinear continuous-time systems without switching.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131222591","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
L. T. Phan, Reinhard Schneider, S. Chakraborty, Insup Lee
{"title":"Modeling buffers with data refresh semantics in automotive architectures","authors":"L. T. Phan, Reinhard Schneider, S. Chakraborty, Insup Lee","doi":"10.1145/1879021.1879038","DOIUrl":"https://doi.org/10.1145/1879021.1879038","url":null,"abstract":"Automotive architectures consist of multiple electronic control units (ECUs) which run distributed control applications. Such ECUs are connected to sensors and actuators and communicate via shared buses. Resource arbitration at the ECUs and also in the communication medium, coupled with variabilities in execution requirements of tasks results in jitter in the signal/data streams existing in the system. As a result, buffers are required at the ECUs and bus controllers. However, these buffers often implement different semantics -- FIFO queuing, which is the most straightforward buffering scheme, and data refreshing, where stale data is overwritten by freshly sampled data. Traditional timing and schedulability analysis that are used to compute, e.g., end-to-end delays, in such automotive architectures can only model FIFO buffering. As a result, they return pessimistic delay and resource estimates because in reality paper we propose an analytical framework for accurately modeling such data refresh semantics. Our model exploits a novel feedback control mechanism and is purely functional in nature. As a result, it is scalable and does not involve any explicit state modeling. Using this model we can estimate various timing and performance metrics for automotive ECU networks consisting of buffers implementing different data handling semantics. We illustrate the utility of this model through three case studies from the automotive electronics domain.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"59 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114354129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Switching logic synthesis for reachability","authors":"Ankur Taly, A. Tiwari","doi":"10.1145/1879021.1879025","DOIUrl":"https://doi.org/10.1145/1879021.1879025","url":null,"abstract":"We consider the problem of driving a system from some initial configuration to a desired configuration while avoiding some unsafe configurations. The system to be controlled is a dynamical system that can operate in different modes. The goal is to synthesize the logic for switching between the modes so that the desired reachability property holds.\u0000 In this paper, we first present a sound and complete inference rule for proving reachability properties of single mode continuous dynamical systems. Next, we present an inference rule for proving controlled reachability in multi-modal continuous dynamical systems. From a constructive proof of controlled reachability, we show how to synthesize the desired switching logic. We show that our synthesis procedure is sound and produces only non-zeno hybrid systems.\u0000 In practice, we perform a constructive proof of controlled reachability by solving an Exists-Forall formula in the theory of reals. We present an approach for solving such formulas that combines symbolic and numeric solvers. We demonstrate our approach on some examples. All results extend naturally to the case when, instead of reachability, interest is in until properties.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"176 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122285695","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Rajeev, S. Mohalik, Manoj G. Dixit, Devesh B. Chokshi, S. Ramesh
{"title":"Schedulability and end-to-end latency in distributed ECU networks: formal modeling and precise estimation","authors":"A. Rajeev, S. Mohalik, Manoj G. Dixit, Devesh B. Chokshi, S. Ramesh","doi":"10.1145/1879021.1879039","DOIUrl":"https://doi.org/10.1145/1879021.1879039","url":null,"abstract":"Embedded control systems in automobiles are typically implemented by a set of tasks deployed on multiple Electronic Control Units (ECUs) communicating via one or more buses like CAN or FlexRay. In the case of safety-critical systems, there are hard real-time bounds on the (i) response times of tasks/messages, and (ii) end-to-end latencies of certain task/message chains. These depend on various factors like the number of tasks (and messages) involved in the processing (and communication) sequence, parameters of these tasks/messages, scheduling policies, communication protocols, clock drifts, etc. Moreover, since the data transfer among tasks/messages is typically via asynchronous buffers that are overwritable and sticky, multiple semantics are possible for end-to-end latency. Hence, precise estimation of response times and end-to-end latencies in embedded systems is a non-trivial problem.\u0000 In this paper, we propose a model-checking based technique to compute worst-case response times and end-to-end latencies. We consider a distributed system made of preemptively scheduled tasks and non-preemptively scheduled messages. Given a chain in the system, we estimate two different end-to-end latencies --LIFO and LILO-- which are important in automotive domain. From a system description, we automatically synthesize a formal model based on a discrete event simulation formalism called Calendar Automata. It is then model-checked to compute response times and end-to-end latencies. Our technique is more scalable than the existing formal methods based techniques. We have illustrated this technique on reasonably large case-studies from the automotive domain.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115395236","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Adolfo Anta Martinez, R. Majumdar, I. Saha, P. Tabuada
{"title":"Automatic verification of control system implementations","authors":"Adolfo Anta Martinez, R. Majumdar, I. Saha, P. Tabuada","doi":"10.1145/1879021.1879024","DOIUrl":"https://doi.org/10.1145/1879021.1879024","url":null,"abstract":"Software implementations of controllers for physical subsystems form the core of many modern safety-critical systems such as aircraft flight control and automotive engine control. A fundamental property of such implementations is stability, the guarantee that the physical plant converges to a desired behavior under the actions of the controller. We present a methodology and a tool to perform automated static analysis of embedded controller code for stability of the controlled physical system.\u0000 The design of controllers for physical systems provides not only the controllers but also mathematical proofs of their stability under idealized mathematical models. Unfortunately, since these models do not capture most of the implementation details, it is not always clear if the stability properties are retained by the software implementation, either because of software bugs, or because of imprecisions arising from fixed-precision arithmetic or timing.\u0000 Our methodology is based on the following separation of concerns. First, we analyze the controller mathematical models to derive bounds on the implementation errors that can be tolerated while still guaranteeing stability. Second, we automatically analyze the controller software to check if the maximal implementation error is within the tolerance bound computed in the first step.\u0000 We have implemented this methodology in Costan, a tool to check stability for controller implementations. Using Costan, we analyzed a set of control examples whose mathematical models are given in Matlab/Simulink and whose C implementation is generated using Real-Time Workshop. Unlike previous static analysis research, which has focused on proving low-level runtime properties such as absence of buffer overruns or arithmetic overflows, our technique combines analysis of the mathematical controller models and automated analysis of source code to guarantee application-level stability properties.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114707185","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Borzoo Bonakdarpour, M. Bozga, Mohamad Jaber, J. Quilbeuf, J. Sifakis
{"title":"From high-level component-based models to distributed implementations","authors":"Borzoo Bonakdarpour, M. Bozga, Mohamad Jaber, J. Quilbeuf, J. Sifakis","doi":"10.1145/1879021.1879049","DOIUrl":"https://doi.org/10.1145/1879021.1879049","url":null,"abstract":"Although distributed systems are widely used nowadays, their implementation and deployment is still a time-consuming, error-prone, and hardly predictive task. In this paper, we propose a methodology for producing automatically efficient and correct-by-construction distributed implementations by starting from a high-level model of the application software in BIP. BIP (Behavior, Interaction, Priority) is a component-based framework with formal semantics that rely on multi-party interactions for synchronizing components. Our methodology transforms arbitrary BIP models into Send/Receive BIP models, directly implementable on distributed execution platforms. The transformation consists of (1) breaking atomicity of actions in atomic components by replacing strong synchronizations with asynchronous Send/Receive interactions; (2) inserting several distributed controllers that coordinate execution of interactions according to a user-defined partition, and (3) augmenting the model with a distributed algorithm for handling conflicts between controllers preserving observational equivalence to the initial models. Currently, it is possible to generate from Send/Receive models stand-alone C++ implementations using either TCP sockets for conventional communication, or MPI implementation, for deployment on multi-core platforms. This method is fully implemented. We report concrete results obtained under different scenarios.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127342644","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}