IEEE International Workshop on Cellular Neural Networks and their Applications最新文献

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Finding multiple equilibrium points of cellular neural networks without enumeration 不枚举求细胞神经网络的多个平衡点
IEEE International Workshop on Cellular Neural Networks and their Applications Pub Date : 1990-12-16 DOI: 10.1109/CNNA.1990.207506
L. Vandenberghe, J. Vandewalle
{"title":"Finding multiple equilibrium points of cellular neural networks without enumeration","authors":"L. Vandenberghe, J. Vandewalle","doi":"10.1109/CNNA.1990.207506","DOIUrl":"https://doi.org/10.1109/CNNA.1990.207506","url":null,"abstract":"A path-following method is presented for computing multiple equilibrium points in cellular neural networks. The method is guaranteed to find at least one solution. The possibility of finding all solutions is also investigated, and this leads to theoretical insight into the relation between the properties of the interconnection matrix and the number of equilibrium points.<<ETX>>","PeriodicalId":142909,"journal":{"name":"IEEE International Workshop on Cellular Neural Networks and their Applications","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133373640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A cellular neural network embedded in a dual computing structure (CNND) and its use for character recognition 一种嵌入二元计算结构(CNND)的细胞神经网络及其在字符识别中的应用
IEEE International Workshop on Cellular Neural Networks and their Applications Pub Date : 1990-12-16 DOI: 10.1109/CNNA.1990.207511
T. Szirányi, T. Roska, P. Szolgay
{"title":"A cellular neural network embedded in a dual computing structure (CNND) and its use for character recognition","authors":"T. Szirányi, T. Roska, P. Szolgay","doi":"10.1109/CNNA.1990.207511","DOIUrl":"https://doi.org/10.1109/CNNA.1990.207511","url":null,"abstract":"Analog neural networks and various regular analog processing arrays are superior in speed, in various tasks, to digital-logical machines. However, in real problems logical decisions and control are generally inevitable. The combination of analog neural and digital logical systems in a dual computing structure has been proposed by T. Roska (1987). A special type of dual computing structure is proposed as a system for character or symbol recognition purposes. It contains a cellular neural network for real-time feature extraction. This cellular neural network embedded in a dual computing structure (CNND) provides a framework for designing algorithms containing sequences of analog and digital operations. This CNND architecture is then used for some well-defined character recognition tasks. Mainly the recognition of printed characters is studied. Several dual algorithms are introduced for classifying various classes of printed character sets. These algorithms contain analog CNN cloning templates and digital decision functions. Preliminary experimental results are presented.<<ETX>>","PeriodicalId":142909,"journal":{"name":"IEEE International Workshop on Cellular Neural Networks and their Applications","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134576160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
ASIM, an efficient simulation environment for cellular neural networks and analog arrays 一个有效的模拟环境,用于细胞神经网络和模拟阵列
IEEE International Workshop on Cellular Neural Networks and their Applications Pub Date : 1990-12-16 DOI: 10.1109/CNNA.1990.207518
K. R. Krieg, L. Chua
{"title":"ASIM, an efficient simulation environment for cellular neural networks and analog arrays","authors":"K. R. Krieg, L. Chua","doi":"10.1109/CNNA.1990.207518","DOIUrl":"https://doi.org/10.1109/CNNA.1990.207518","url":null,"abstract":"Summary form only given. Traditional circuit-based simulation of cellular neural networks and analog arrays is very slow and cumbersome. Much of the computation and memory space involved could be reduced if the data and computational structures of the program could mirror the architecture of the analog array. The authors present the details of such a simulator, named ASIM. The computations performed by ASIM are derived directly from the nonlinear differential equations describing the processing at each node and the internal data representation mirrors the architecture of analog arrays. ASIM is a graphical environment for simulating continuous-time continuous-variable computational arrays which have a regular structure, whose connectivity is nearest-neighbor, and whose nodal processing can be described by a set of nonlinear differential equations. The user need specify only the equations for nodal processing and the connectivity to neighboring processors. Input and output are graphical and show the state of all variables in the array as a function of time. The user may incorporate iteration of any internal variable to find optimal processing strategies or neighborhood organization. To aid the evaluation of algorithms which are to be fabricated in VLSI, the use can specify variances in any computational variable to simulate the effect of fabrication tolerances and may specify that certain variables have associated noise components. Both of these features make ASIM an ideal aid in developing analog array and cellular neural network algorithms which are more robust to implementation variability. The ASIM program runs on 80386 based IBM PC/AT computers using the MS-DOS operating system. It requires 2 Mbytes of extended memory and a VGA compatible graphics card.<<ETX>>","PeriodicalId":142909,"journal":{"name":"IEEE International Workshop on Cellular Neural Networks and their Applications","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123846079","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Analog VLSI implementation of a neural network with competitive learning 模拟VLSI实现的一个具有竞争性学习的神经网络
IEEE International Workshop on Cellular Neural Networks and their Applications Pub Date : 1990-12-16 DOI: 10.1109/CNNA.1990.207525
F. Pelayo, A. Prieto, B. Pino, P. Martín-Smith
{"title":"Analog VLSI implementation of a neural network with competitive learning","authors":"F. Pelayo, A. Prieto, B. Pino, P. Martín-Smith","doi":"10.1109/CNNA.1990.207525","DOIUrl":"https://doi.org/10.1109/CNNA.1990.207525","url":null,"abstract":"An analog VLSI implementation of a neural network is presented which has been designed for use in clustered systems with competitive learning. The circuit implements an inhibitory cluster that includes the winner-unit computation. The synaptic weights are externally alterable asynchronously with network operation. A test chip has been designed with the rules of a 2- mu m CMOS process which shows high integration density (about 200 synaptic connections per square millimeter). Simulation results and VLSI realization details of different modules comprised in the chip are also presented.<<ETX>>","PeriodicalId":142909,"journal":{"name":"IEEE International Workshop on Cellular Neural Networks and their Applications","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126872282","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
The non-idealities of the IC-realization and the stability of CNN-networks 集成电路实现的非理想性与cnn网络的稳定性
IEEE International Workshop on Cellular Neural Networks and their Applications Pub Date : 1990-12-16 DOI: 10.1109/CNNA.1990.207537
K. Halonen, J. Vaananen
{"title":"The non-idealities of the IC-realization and the stability of CNN-networks","authors":"K. Halonen, J. Vaananen","doi":"10.1109/CNNA.1990.207537","DOIUrl":"https://doi.org/10.1109/CNNA.1990.207537","url":null,"abstract":"The stability analyses of the CNN-circuit has been carried out in the case when the sigmoid has offset, nonconstant saturation level and nonlinearity. Also the effect of the internal parasitic poles on the circuit performance has been studied through several simulations. The analyses have been verified with the SPICE simulations done on the experimental 4-by-4 CNN circuit.<<ETX>>","PeriodicalId":142909,"journal":{"name":"IEEE International Workshop on Cellular Neural Networks and their Applications","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115525027","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
The VLSI kernel of neural algorithms VLSI内核神经算法
IEEE International Workshop on Cellular Neural Networks and their Applications Pub Date : 1990-12-16 DOI: 10.1109/CNNA.1990.207524
U. Ramacher
{"title":"The VLSI kernel of neural algorithms","authors":"U. Ramacher","doi":"10.1109/CNNA.1990.207524","DOIUrl":"https://doi.org/10.1109/CNNA.1990.207524","url":null,"abstract":"A unified description of neural algorithms by means of general objective functions is shown to be the key to economic design of software and hardware. The compute-intensive algorithmic strings present in the dynamical equations corresponding to an objective function are to be executed by dedicated VLSI circuits. Cellular neural networks are recovered as a special case, and a corresponding general learning rule is derived.<<ETX>>","PeriodicalId":142909,"journal":{"name":"IEEE International Workshop on Cellular Neural Networks and their Applications","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130180623","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Detecting simple motion using cellular neural networks 用细胞神经网络检测简单运动
IEEE International Workshop on Cellular Neural Networks and their Applications Pub Date : 1990-12-16 DOI: 10.1109/CNNA.1990.207516
T. Roska, T. Boros, Patrick Thiran, L. Chua
{"title":"Detecting simple motion using cellular neural networks","authors":"T. Roska, T. Boros, Patrick Thiran, L. Chua","doi":"10.1109/CNNA.1990.207516","DOIUrl":"https://doi.org/10.1109/CNNA.1990.207516","url":null,"abstract":"The general framework of motion detection based on the discrete-time samples of the moving image is defined. Four types of motion detection problem are studied. The simplest one is a model resembling the experiment of D.H. Hubel and T.N. Wiesel (1962) with a cat's retina for detecting the motion of an object having a given speed in a given direction. The most complicated case is the determination of the vertical and horizontal velocity components of a moving image. Various cloning template sequences are proposed for detecting different types of motion. The consecutive black and white image samples are fed to the input and to the initial state nodes of the cellular neural network, respectively. After the transients have decayed, the output gives the information necessary for detecting the presence or absence of a specific motion as well as for estimating the direction and the magnitude of the velocity vector. Conditions are analysed under which the detection is correct. The circuit realization of some motion detectors are discussed and the use of a programmable dual CNN structure is proposed.<<ETX>>","PeriodicalId":142909,"journal":{"name":"IEEE International Workshop on Cellular Neural Networks and their Applications","volume":"177 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124388750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 116
Cellular neural networks with nonlinear and delay-type template elements 具有非线性和延迟型模板元素的细胞神经网络
IEEE International Workshop on Cellular Neural Networks and their Applications Pub Date : 1990-12-16 DOI: 10.1109/CNNA.1990.207503
T. Roska, L. Chua
{"title":"Cellular neural networks with nonlinear and delay-type template elements","authors":"T. Roska, L. Chua","doi":"10.1109/CNNA.1990.207503","DOIUrl":"https://doi.org/10.1109/CNNA.1990.207503","url":null,"abstract":"The cellular neural network (CNN) paradigm is a powerful framework for analog nonlinear processing arrays placed on a regular grid. The authors extend the repertoire of CNN cloning template elements (atoms) by introducing additional nonlinear and delay-type characteristics. With this generalization, several well-known and powerful analog array-computing structures can be interpreted as special cases of the CNN. Moreover, it is shown that the CNN with these generalized cloning templates has a general programmable circuit structure with analog macros and algorithms. The relations with the cellular automaton and the systolic array are analysed. Finally, some robust stability results and the state-space structure of the dynamics are presented.<<ETX>>","PeriodicalId":142909,"journal":{"name":"IEEE International Workshop on Cellular Neural Networks and their Applications","volume":"279 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116437550","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 214
Realization of CNNs by optical parallel processing with spatial light valves 空间光阀光学并行处理实现cnn
IEEE International Workshop on Cellular Neural Networks and their Applications Pub Date : 1990-12-16 DOI: 10.1109/CNNA.1990.207533
N. Fruhauf, E. Luder
{"title":"Realization of CNNs by optical parallel processing with spatial light valves","authors":"N. Fruhauf, E. Luder","doi":"10.1109/CNNA.1990.207533","DOIUrl":"https://doi.org/10.1109/CNNA.1990.207533","url":null,"abstract":"Proposes an optical realization of cellular neural networks (CNNs). Any implementation of CNNs must calculate correlations of templates and input or output states of neurons. Therefore the system described is based on an optical special purpose processor which is perfectly suited for the computation of real time correlations. The processor is made of lenses and electronically addressed liquid crystal light valves which permit real time modifications of inputs and templates. Large neural nets and templates which are not restricted in their connectivity can be realized with massive optical parallel processing.<<ETX>>","PeriodicalId":142909,"journal":{"name":"IEEE International Workshop on Cellular Neural Networks and their Applications","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115572280","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
A hardware accelerator board for cellular neural networks: CNN-HAC 用于细胞神经网络的硬件加速板:CNN-HAC
IEEE International Workshop on Cellular Neural Networks and their Applications Pub Date : 1990-12-16 DOI: 10.1109/CNNA.1990.207520
T. Roska, G. Bártfai, P. Szolgay, T. Szirányi, A. Radványi, T. Kozek, Z. Ugray
{"title":"A hardware accelerator board for cellular neural networks: CNN-HAC","authors":"T. Roska, G. Bártfai, P. Szolgay, T. Szirányi, A. Radványi, T. Kozek, Z. Ugray","doi":"10.1109/CNNA.1990.207520","DOIUrl":"https://doi.org/10.1109/CNNA.1990.207520","url":null,"abstract":"The hardware accelerator (HAC) boards using catalog programmable VLSI ICs represent a trade-off having higher reconfigurability and lower cost. This paper presents such a solution for a cellular neural network (CNN). The architecture of the present design (CNN-HAC) using 4 standard DSPs to calculate the transient response of a one-layer CNN containing 0.25-1.0 million analog neural cells is presented. The architecture and also the design principles are independent of the number of processors. The actual design was made in the form of a PC add-on board. The global control unit, which connects the board to the host firmware and communicates control signals to/from the local control units of the DSPs, was realized mainly with EPLDs. A special correspondence between the virtual processing elements-calculating the time discrete models of the analog neural cells-and the physical ones, established to work an architecture with an infrequent, one-directional interprocessor communication, is discussed in detail.<<ETX>>","PeriodicalId":142909,"journal":{"name":"IEEE International Workshop on Cellular Neural Networks and their Applications","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127006749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 24
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