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Attacking the smart grid using public information 利用公共信息攻击智能电网
2016 17th Latin-American Test Symposium (LATS) Pub Date : 2016-04-06 DOI: 10.1109/LATW.2016.7483348
Charalambos Konstantinou, Marios Sazos, M. Maniatakos
{"title":"Attacking the smart grid using public information","authors":"Charalambos Konstantinou, Marios Sazos, M. Maniatakos","doi":"10.1109/LATW.2016.7483348","DOIUrl":"https://doi.org/10.1109/LATW.2016.7483348","url":null,"abstract":"Over the past years, sophisticated adversaries have infiltrated the control networks of energy companies around the globe. As attempts to compromise industrial control and information technology systems have soared, electric utilities increase their investments in cyber security as an important step to enhance resiliency of the power system. Although utility companies started adopting a defense in depth strategy, compliant with security reliability standards, the first step towards building effective mitigation strategies is to understand the attack vectors emerging from publicly available information. To this end, we utilize data from accessible resources to create a map of the topological and electrical structure of smart grid regions. Furthermore, we identify electronic devices able to control the critical electrical units in the system. The location and characteristics of these components are used in a simulation environment to study the interaction of controls and dynamics in the system. Lastly, we examine the paths of attacking control equipment and discuss the impact of such scenarios.","PeriodicalId":135851,"journal":{"name":"2016 17th Latin-American Test Symposium (LATS)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128438993","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
Comparative study of Bulk, FDSOI and FinFET technologies in presence of a resistive short defect 块体、FDSOI和FinFET技术在电阻性短缺陷下的比较研究
2016 17th Latin-American Test Symposium (LATS) Pub Date : 2016-03-06 DOI: 10.1109/LATW.2016.7483352
Amit Karel, M. Comte, J. Gallière, F. Azaïs, M. Renovell
{"title":"Comparative study of Bulk, FDSOI and FinFET technologies in presence of a resistive short defect","authors":"Amit Karel, M. Comte, J. Gallière, F. Azaïs, M. Renovell","doi":"10.1109/LATW.2016.7483352","DOIUrl":"https://doi.org/10.1109/LATW.2016.7483352","url":null,"abstract":"In this paper, we analyze the electrical behavior of logic gates in presence of defect for different technologies. The final objective is to compare the defect detectability in a traditional planar Bulk technology, the emerging FDSOI and FinFET technologies. We implemented similar design in each technology and compared the electrical behavior with the same resistive short defect.","PeriodicalId":135851,"journal":{"name":"2016 17th Latin-American Test Symposium (LATS)","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124697603","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
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