块体、FDSOI和FinFET技术在电阻性短缺陷下的比较研究

2016 17th Latin-American Test Symposium (LATS) Pub Date : 2016-03-06 DOI:10.1109/LATW.2016.7483352

Amit Karel, M. Comte, J. Gallière, F. Azaïs, M. Renovell

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引用次数: 12

摘要

本文分析了不同工艺条件下存在缺陷的逻辑门的电学行为。最后的目标是比较传统的平面体技术、新兴的FDSOI和FinFET技术的缺陷可检测性。我们在每种技术中实现了类似的设计，并比较了相同电阻性短缺陷的电学行为。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Comparative study of Bulk, FDSOI and FinFET technologies in presence of a resistive short defect

In this paper, we analyze the electrical behavior of logic gates in presence of defect for different technologies. The final objective is to compare the defect detectability in a traditional planar Bulk technology, the emerging FDSOI and FinFET technologies. We implemented similar design in each technology and compared the electrical behavior with the same resistive short defect.

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2016 17th Latin-American Test Symposium (LATS)

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