A. Stoica, R. Zebulum, Xin Guo, D. Keymeulen, M. I. Ferguson, V. Duong
{"title":"Silicon validation of evolution-designed circuits","authors":"A. Stoica, R. Zebulum, Xin Guo, D. Keymeulen, M. I. Ferguson, V. Duong","doi":"10.1109/EH.2003.1217638","DOIUrl":"https://doi.org/10.1109/EH.2003.1217638","url":null,"abstract":"No silicon fabrication and characterization of circuits with topologies designed by evolution has been done before, leaving open questions about the feasibility of the evolutionary design approach, as well as on how high performance, robust, or portable such designs could really be when implemented in hardware. This paper is the first to report on a silicon implementation of circuits evolved in simulation. Several circuits were evolved and fabricated in a 0.5-micron CMOS process. This paper focuses on results of logical gates evolved at a transistor level. It discusses the steps taken in order to increase the chances of robust and portable designs, summarizes the results of characterization tests based on chip measurements, and comments on the performance comparing to simulations.","PeriodicalId":134823,"journal":{"name":"NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings.","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128751048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The once and future analog alternative: evolvable hardware and analog computation","authors":"J. Gallagher","doi":"10.1109/EH.2003.1217641","DOIUrl":"https://doi.org/10.1109/EH.2003.1217641","url":null,"abstract":"Once-upon-a-time, analog computers co-existed with their digital counterparts and were considered equally useful. For many applications, specifically equation solving and modeling of physical systems, analog computers were often the better choice. The 1970's, however, saw the beginning of the end of this superiority. Advances in digital circuit fabrication and discrete computer algorithms, not to mention significant advantages of economy, generality, and ease of use, precipitated a mass exodus to general-purpose digital computers so complete that there are now many in the current generation who have neither experience with, nor memory of, the analog alternative. The exodus was certainly made for good reasons. However, it may be beneficial, from time to time, to consider if subsequent developments have rendered those reasons less compelling. This first part of this paper will suggest that the emergence of evolvable hardware (EH) is one such development. It will argue that by applying EH methodologies, one might practically restore the benefits of analog computation as well as achieve benefits not possible in earlier times. The second part of this paper will briefly outline a specific program designed to field practical analog EH control devices.","PeriodicalId":134823,"journal":{"name":"NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings.","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121613363","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The importance of reuse and development in evolvable hardware","authors":"J. Koza, M. A. Keane, Matthew J. Streeter","doi":"10.1109/EH.2003.1217640","DOIUrl":"https://doi.org/10.1109/EH.2003.1217640","url":null,"abstract":"Reuse will become increasingly important as larger digital and analog circuits are created by the techniques of the field of evolvable hardware. This paper discusses the ways by which genetic programming can facilitate reuse and the associated advantages of using a developmental process.","PeriodicalId":134823,"journal":{"name":"NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings.","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125602311","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The evolutionary design and synthesis of non-linear digital VLSI systems","authors":"R. Thomson, T. Arslan","doi":"10.1109/EH.2003.1217657","DOIUrl":"https://doi.org/10.1109/EH.2003.1217657","url":null,"abstract":"This paper describes a multi-objective evolutionary algorithm (EA) system for the synthesis of efficient non-linear VLSI circuit modules. The EA takes the specification for a non-linear block, and converts it into a technology independent netlist, specified in the Verilog hardware description language. The hardware designs are based upon highlevel components such as adders and multipliers. The circuit designs that are produced are near-optimal with respect to silicon area and longest-path delay. The performance of the EA is enhanced through the use of local searches. These searches are embedded within the genetic operators, and enable the rapid evaluation of large numbers of designs. The use of searches increases the power of the EA system, without forfeiting the benefits of using a population of solutions. The system is demonstrated with several test problems. Results are presented for the discovery of correct designs, and also regarding the quality of the evolved designs. The most complex designs have areas as large as 200,000/spl mu/m/sup 2/ in a 0.18/spl mu/m technology.","PeriodicalId":134823,"journal":{"name":"NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings.","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120961441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A scalable platform for intrinsic hardware and in materio evolution","authors":"Simon Harding, J. Miller","doi":"10.1109/EH.2003.1217669","DOIUrl":"https://doi.org/10.1109/EH.2003.1217669","url":null,"abstract":"An evolvable motherboard is an intrinsic evolution platform that allows the detailed probing of internal signals of circuits that have been evolved. Several designs for an evolvable motherboard have already been demonstrated to work successfully as a platform for the evolution of electronic circuits. This paper proposes a new platform that is suitable for intrinsic evolution using a wider variety of media. The platform presents a more modular design, making it suitable for use in evolving more complex physical primitives whilst affording the possibility of performing evolution in parallel for simpler problems. The construction of the device is discussed and examples of potential experiments in silicon, liquid crystal and other media are described.","PeriodicalId":134823,"journal":{"name":"NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings.","volume":"679 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116107077","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Evolving sinusoidal oscillators using genetic algorithms","authors":"V. Aggarwal","doi":"10.1109/EH.2003.1217647","DOIUrl":"https://doi.org/10.1109/EH.2003.1217647","url":null,"abstract":"In the present paper, single-opamp sinusoidal oscillators are synthesized using genetic algorithms. The motivation is to evolve new topologies of oscillators using different active building blocks (ABBs) and automate the study of their properties. A new fitness evaluation scheme by analyzing transfer function of the circuits is used and a learning scheme loosely inspired from Lamarckian search is also suggested. A new problem specific crossover operator is tested and a comparative study of different crossover operators is done. On comparison of the results of the GA with existing results, it was found that the GA rediscovered all the twelve canonic singleopamp based SFOs. Some new interesting opamp, OTRA and DDCC based topologies of oscillators are also presented. It is clearly explained how this study can be extended to other ABBs or multiple ABBs.","PeriodicalId":134823,"journal":{"name":"NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings.","volume":"228 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133941621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Learning for evolutionary design","authors":"S. Louis","doi":"10.1109/EH.2003.1217637","DOIUrl":"https://doi.org/10.1109/EH.2003.1217637","url":null,"abstract":"This paper describes a technique for evolving similar solutions to similar configuration design problems. Using the configuration design of combination logic circuits as a test bed, the paper shows that combining genetic algorithms with a case-based memory leads to improved performance on sets of similar design problems. In this approach, rather than starting from scratch on each design, we periodically inject a genetic algorithm's population with appropriate partial solutions to similar previously attempted problems. Experimental results on the combinational logic design of parity checkers and adders shows that this system takes less time to provide better quality solutions to new design problems as it gains experience from solving other similar design problems. The designs generated by the combined system also tend to be more similar than those generated by a randomly initialized genetic algorithm. This implies that the system can be used for quick, high quality re-design so that when components fail or deteriorate, we can quickly regain lost or deteriorating functionality.","PeriodicalId":134823,"journal":{"name":"NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings.","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129556083","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Robot fault-tolerance using an embryonic array","authors":"Alexander H. Jackson, R. Canham, A. Tyrrell","doi":"10.1109/EH.2003.1217651","DOIUrl":"https://doi.org/10.1109/EH.2003.1217651","url":null,"abstract":"Fault-tolerance, complex structure management and reconfiguration are seen as valuable characteristics. Embryonic arrays represent one novel approach that takes inspiration from nature to improve upon standard techniques. An existing BAE SYSTEMS RASCAL/spl trade/ robot has been augmented so as to improve the motor control system reliability through two biologically-inspired systems: an embryonic array and an artificial immune system. This paper is concerned with the embryonic array; this is novel in that it supports datapath-wide arithmetic and logic functions. The array is configured to provide an autonomous self-repairing hardware motor controller and is realized using a standard Xilinx Virtex FPGA. As with previous embryonic systems, the logic requirement of the array is greater than that of a conventional FPGA or standard modular-redundancy approach. However, the array offers the advantages of both conventional FPGAs and modular-redundancy techniques. It is a reconfigurable computing platform that provides inherent fault-tolerance through its distributed self-repair mechanism.","PeriodicalId":134823,"journal":{"name":"NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings.","volume":"385 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124779537","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Plante, H. Shaw, Lisa P. Mickens, Charles T. Johnson-Bey
{"title":"Overview of field programmable analog arrays as enabling technology for evolvable hardware for high reliability systems","authors":"J. Plante, H. Shaw, Lisa P. Mickens, Charles T. Johnson-Bey","doi":"10.1109/EH.2003.1217648","DOIUrl":"https://doi.org/10.1109/EH.2003.1217648","url":null,"abstract":"The recent commercial availability of field programmable analog arrays (FPAAs) is leading designers of high reliability space and ground support systems to consider how these devices can lead to new applications. They hold promises for analog systems that require reactive evolvability such as those that correct defective mechanical deployments. They are also suited to evolving circuits, which change with temporary or degenerative electrical conditions such as those associated with power systems during specific periods of orbit in space flight and with the effects of aging on electronic components. FPAAs are seen as a key enabler to a system in development that will enable circuit development in a hardware environment that can be programmed and tailored for a given system's electrical input/output/load environment.","PeriodicalId":134823,"journal":{"name":"NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings.","volume":"506 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134286023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Improvements to the *CGA enabling online intrinsic evolution in compact EH devices","authors":"Gregory R. Kramer, J. Gallagher","doi":"10.1109/EH.2003.1217670","DOIUrl":"https://doi.org/10.1109/EH.2003.1217670","url":null,"abstract":"Recently, we proposed a neuromorphic intrinsic online evolvable hardware (EH) system designed to learn control laws of physical devices. Since we intend to eventually build this device using mixed signal VLSI techniques, and because we intend to address control applications in which small size and low power consumption are critical, we are extremely concerned with the design of physically compact devices. This paper focuses on the evolutionary algorithm (EA) portion of our proposed system. We discuss modifications to our previously reported *CGA that significantly increases its performance against dynamic optimization problems without significantly increasing the amount of hardware required for implementation. We demonstrate the efficacy of our improvement by testing against two series of moving peak benchmarks. We conclude with discussions of both the implications of our findings and our plans for future work.","PeriodicalId":134823,"journal":{"name":"NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings.","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132624279","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}