IEEE Transactions on Emerging Topics in Computing最新文献_第6页

FedRDF: A Robust and Dynamic Aggregation Function Against Poisoning Attacks in Federated Learning FedRDF：联盟学习中抵御中毒攻击的稳健动态聚合函数

IF 5.1 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2024-10-10 DOI: 10.1109/TETC.2024.3474484

Enrique Mármol Campos;Aurora Gonzalez-Vidal;José L. Hernández-Ramos;Antonio Skarmeta

{"title":"FedRDF: A Robust and Dynamic Aggregation Function Against Poisoning Attacks in Federated Learning","authors":"Enrique Mármol Campos;Aurora Gonzalez-Vidal;José L. Hernández-Ramos;Antonio Skarmeta","doi":"10.1109/TETC.2024.3474484","DOIUrl":"https://doi.org/10.1109/TETC.2024.3474484","url":null,"abstract":"Federated Learning (FL) represents a promising approach to typical privacy concerns associated with centralized Machine Learning (ML) deployments. Despite its well-known advantages, FL is vulnerable to security attacks such as Byzantine behaviors and poisoning attacks, which can significantly degrade model performance and hinder convergence. The effectiveness of existing approaches to mitigate complex attacks, such as median, trimmed mean, or Krum aggregation functions, has been only partially demonstrated in the case of specific attacks. Our study introduces a novel robust aggregation mechanism utilizing the Fourier Transform (FT), which is able to effectively handle sophisticated attacks without prior knowledge of the number of attackers. Employing this data technique, weights generated by FL clients are projected into the frequency domain to ascertain their density function, selecting the one exhibiting the highest frequency. Consequently, malicious clients’ weights are excluded. Our proposed approach was tested against various model poisoning attacks, demonstrating superior performance over state-of-the-art aggregation methods.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"13 1","pages":"48-67"},"PeriodicalIF":5.1,"publicationDate":"2024-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10713851","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143570755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Federated Learning Approach for Collaborative and Secure Smart Healthcare Applications 用于协作和安全智能医疗保健应用程序的联邦学习方法

IF 5.1 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2024-10-10 DOI: 10.1109/TETC.2024.3473911

Quy Vu Khanh;Abdellah Chehri;Van Anh Dang;Quy Nguyen Minh

{"title":"Federated Learning Approach for Collaborative and Secure Smart Healthcare Applications","authors":"Quy Vu Khanh;Abdellah Chehri;Van Anh Dang;Quy Nguyen Minh","doi":"10.1109/TETC.2024.3473911","DOIUrl":"https://doi.org/10.1109/TETC.2024.3473911","url":null,"abstract":"Across all periods of human history, the importance attributed to health has remained a fundamental and significant facet. This statement holds greater validity within the present context. The pressing demand for healthcare solutions with real-time capabilities, affordability, and high precision is crucial in medical research and technology progress. In recent times, there has been a significant advancement in emerging technologies such as AI, IoT, blockchain, and edge computing. These breakthrough developments have led to the creation of various intelligent applications. Smart healthcare applications can be realized by combining robust AI detection and prediction capabilities with edge computing architecture, which offers low computing costs and latency. In this paper, we begin by conducting a literature review of AI-assisted EC-based smart healthcare applications from the past three years. Our goal is to identify gaps and barriers in this field. We propose a smart healthcare architecture model that integrates AI technology into the edge. Finally, we summarize the challenges and research directions associated with the proposed model.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"13 1","pages":"68-79"},"PeriodicalIF":5.1,"publicationDate":"2024-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143570756","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

NGQR: A Novel Generalized Quantum Image Representation NGQR：一种新的广义量子图像表示

IF 5.4 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2024-10-07 DOI: 10.1109/TETC.2024.3471086

Zheng Xing;Xiaochen Yuan;Chan-Tong Lam;Penousal Machado

{"title":"NGQR: A Novel Generalized Quantum Image Representation","authors":"Zheng Xing;Xiaochen Yuan;Chan-Tong Lam;Penousal Machado","doi":"10.1109/TETC.2024.3471086","DOIUrl":"https://doi.org/10.1109/TETC.2024.3471086","url":null,"abstract":"To address the size limitations of existing quantum image models in terms of accurate image representation, as well as inaccurate image operation and retrieval, we propose a Novel Generalized Quantum Image Representation (NGQR) for images of arbitrary size and type. For generalizing the size model, we first propose the Perception-Aided Encoding (PE) method to perceive the target qubits in the quantum information. Based on PE, we propose the quantum image representation PE-NGQR, which accurately ignores redundant information thereby targeting valid pixels for operations and retrieval. Then, to accurately represent the needed pixel information without redundancy, we propose the Coherent-Size Encoding (CE) method. The CE can encode an arbitrary number of quantum states. Based on CE, we propose CE-NGQR, a quantum image model capable of accurate image representation, processing and retrieval. Specifically, we describe in detail the concept, representation and quantum circuits of NGQR. We provide detailed quantum circuits and simulations of NGQR-based operations and geometric transformations. Moreover, NGQR enables flexible quantum image scaling. We illustrate the complementarity of the proposed PE-NGQR and CE-NGQR through complexity simulations and clarify the respective applicability scenarios. Finally, comparisons and analyses with existing quantum image models demonstrate the versatility and flexibility advantages of NGQR.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"13 3","pages":"591-603"},"PeriodicalIF":5.4,"publicationDate":"2024-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145050994","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Comparative Analysis of Software Aging in Relational Database System Environments 关系型数据库系统环境下软件老化的比较分析

IF 5.1 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2024-10-07 DOI: 10.1109/TETC.2024.3471684

Herderson Couto;Fumio Machida;Gustavo Callou;Ermeson Andrade

引用次数: 0

Special Section on Emerging Social Computing 新兴社交计算专栏

IF 5.1 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2024-09-05 DOI: 10.1109/TETC.2024.3447428

Yuan-Hao Chang;Paloma Díaz;Yunpeng Xiao

引用次数: 0

DALTON - Deep Local Learning in SNNs via Local Weights and Surrogate-Derivative Transfer DALTON - 通过本地权重和代理-衍生转移在 SNN 中进行深度本地学习

IF 5.4 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2024-08-27 DOI: 10.1109/TETC.2024.3440932

Ramashish Gaurav;Duy Anh Do;Thinh T. Doan;Yang Yi

{"title":"DALTON - Deep Local Learning in SNNs via Local Weights and Surrogate-Derivative Transfer","authors":"Ramashish Gaurav;Duy Anh Do;Thinh T. Doan;Yang Yi","doi":"10.1109/TETC.2024.3440932","DOIUrl":"10.1109/TETC.2024.3440932","url":null,"abstract":"Direct training of Spiking Neural Networks (SNNs) is a challenging task because of their inherent temporality. Added to it, the vanilla Back-propagation based methods are not applicable either, due to the non-differentiability of the spikes in SNNs. Surrogate-Derivative based methods with Back-propagation Through Time (BPTT) address these direct training challenges quite well; however, such methods are not neuromorphic-hardware friendly for the On-chip training of SNNs. Recently formalized Three-Factor based Rules (TFR) for direct local-training of SNNs are neuromorphic-hardware friendly; however, they do not effectively leverage the depth of the SNN architectures (we show it empirically here), thus, are limited. In this work, we present an <italic>improved version of a conventional three-factor rule, for local learning in SNNs which effectively leverages depth – in the context of learning features hierarchically. Taking inspiration from the Back-propagation algorithm, we theoretically derive our improved, local, three-factor based learning method, named DALTON (<underline>Deep Loc<underline>Al <underline>Learning via local Weigh<underline>Ts and Surr<underline>Ogate-Derivative Tra<underline>Nsfer), which employs <italic>weights and <italic>surrogate-derivative transfer from the local layers. Along the lines of TFR, our proposed method DALTON is also amenable to the neuromorphic-hardware implementation. Through extensive experiments on static (MNIST, FMNIST, & CIFAR10) and event-based (N-MNIST, DVS128-Gesture, & DVS-CIFAR10) datasets, we show that our proposed local-learning method DALTON makes <italic>effective use of the depth in Convolutional SNNs, compared to the vanilla TFR implementation.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"13 3","pages":"578-590"},"PeriodicalIF":5.4,"publicationDate":"2024-08-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142216773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

DP-PartFIM: Frequent Itemset Mining Using Differential Privacy and Partition DP-PartFIM：利用差异隐私和分区挖掘常项集

IF 5.4 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2024-08-26 DOI: 10.1109/TETC.2024.3443060

Xinyu Liu;Wensheng Gan;Lele Yu;Yining Liu

引用次数: 0

Area Efficient Skyrmion Logic Based Approximate Adder Architecture Design Methodology 基于面积效率 Skyrmion 逻辑的近似加法器架构设计方法

IF 5.1 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2024-08-02 DOI: 10.1109/TETC.2024.3434723

Santhosh Sivasubramani;Bibekananda Paikaray;Mahathi Kuchibhotla;Arabinda Haldar;Chandrasekhar Murapaka;Amit Acharyya

{"title":"Area Efficient Skyrmion Logic Based Approximate Adder Architecture Design Methodology","authors":"Santhosh Sivasubramani;Bibekananda Paikaray;Mahathi Kuchibhotla;Arabinda Haldar;Chandrasekhar Murapaka;Amit Acharyya","doi":"10.1109/TETC.2024.3434723","DOIUrl":"10.1109/TETC.2024.3434723","url":null,"abstract":"In this study, the first of its kind skyrmion logic based area efficient approximate nanomagnetic (APN) adder architecture design methodology is introduced along with its implementation using theoretical modelling and micromagnetic simulations. We propose here for the first time, skyrmion based APN adder architecture design using only one majority gate reconfigured runtime (RR) using single layout. This low complex device structure is modelled using three inputs with the bilayer ferromagnet/heavy metal utilizing the exploitation of output reversal mechanism using magnetic tunnel junctions (MTJs) for read and write of skyrmions. The implementation is performed using this same device where current is passed through a metallic gate for control mechanism to achieve various logic functionalities. We also introduce here the boolean optimzation followed by mapping logic for the demonstration of skyrmion RRAPN adder alongside the majority logic gate. This proposed RRAPN adder architecture design possess low complexity in terms of utilization of resources aiding towards the reduction of number of majority logic gates (<inline-formula><tex-math>$ sim$</tex-math></inline-formula><inline-formula><tex-math>$60 %$</tex-math></inline-formula> device footprint reduction) and evaluated against standard error metrics. RRAPN adder architecture design proposed has its advantages with miniaturisation aided by enhanced lithographic process nodes, creating a new potential for nanomagnetic logic devices.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"13 2","pages":"525-536"},"PeriodicalIF":5.1,"publicationDate":"2024-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141885345","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

CAT SNN: Conversion Aware Training for High Accuracy and Hardware Friendly Spiking Neural Networks CAT SNN：针对高精度和硬件友好型尖峰神经网络的转换感知训练

IF 5.1 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2024-08-02 DOI: 10.1109/TETC.2024.3435135

Dongwoo Lew;Jongsun Park

{"title":"CAT SNN: Conversion Aware Training for High Accuracy and Hardware Friendly Spiking Neural Networks","authors":"Dongwoo Lew;Jongsun Park","doi":"10.1109/TETC.2024.3435135","DOIUrl":"10.1109/TETC.2024.3435135","url":null,"abstract":"Among the various training algorithms for spiking neural network (SNN), ANN-to-SNN conversion gained popularity due to high accuracy and scalability to deep networks. By converting artificial neural network (ANN) to SNN and employing conversion loss reduction techniques, previous ANN-to-SNN conversion approaches achieved good accuracies. However, previous works do not consider the overheads to implement conversion loss reductions in hardware, thereby limiting its feasibility of hardware implementation. In this paper, we present conversion aware training (CAT), where SNN is simulated as closely as possible during ANN training for obtaining SNN-like ANN. So, our approach does not need any conversion loss reduction techniques after conversion, thus reducing hardware overhead while achieving state-of-the-art accuracies for SNNs using various neural coding methods. In addition, as an application of CAT for obtaining a hardware friendly SNN, we demonstrate a lightweight time-to-first-spike (TTFS) coding that adopts logarithmic computations enabled by CAT. An SNN processor that supports the logarithmic TTFS is implemented in 28nm CMOS process, achieving 91.7/67.9/57.4% accuracy and 486.7/503.6/1426uJ inference energy on CIFAR-10/100/Tiny-ImageNet, when running 5-bit logarithmic weight VGG-16. The key contributions are 1) proposing CAT as an ANN-to-SNN conversion guideline 2) applying CAT on various neural codings 3) presenting co-designed TTFS coding and processor.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"13 2","pages":"512-524"},"PeriodicalIF":5.1,"publicationDate":"2024-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141885301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Acceleration of the Bootstrapping in TFHE by FPGA 利用 FPGA 加速 TFHE 的引导过程

IF 5.1 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2024-07-31 DOI: 10.1109/TETC.2024.3433473

Jian Zhang;Aijiao Cui;Yier Jin

{"title":"Acceleration of the Bootstrapping in TFHE by FPGA","authors":"Jian Zhang;Aijiao Cui;Yier Jin","doi":"10.1109/TETC.2024.3433473","DOIUrl":"10.1109/TETC.2024.3433473","url":null,"abstract":"Privacy-preserving computing is playing an ever-increasingly important role in various fields. A leading example of privacy-preserving computing is Fully Homomorphic Encryption (FHE). FHE enables arbitrary computations directly on the ciphertext. This guarantees that the original data will not be disclosed while processing the data. However, FHE brings in the high computation cost which, in turn, limits the application of FHE. Among all steps of FHE, bootstrapping is a critical operation yet a bottleneck for the FHE efficiency. Torus FHE (TFHE) was presented as a method which can compute arbitrary Boolean functions on ciphertext with fast gate bootstrapping. In this paper, we show an implementation of TFHE gate bootstrapping on ZYNQ ZCU102 FPGA board. The memory operation is specially organized to facilitate the implementation of the adopted Number Theoretic Transform (NTT) of external product. Each function involved in the TFHE gate bootstrapping is implemented at the register-transfer level (RTL), and each operation is carefully scheduled to maximize the parallelism. Experimental results show that with ZCU102 working at the frequency of 300MHz, the proposed scheme can bootstrap one bit within 1.9ms on average. Compared with the accelerated TFHE using the mainstream CPU, the proposed scheme shows a 5.0X speedup. If under the similar clock frequency, it presents 1.23X faster than cuFHE which is accelerated by GPU. The proposed scheme also shows other advantages such as high efficiency and better tradeoff than existing FPGA-based acceleration schemes.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"13 2","pages":"496-511"},"PeriodicalIF":5.1,"publicationDate":"2024-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141868537","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0