Mario Barbareschi;Franco Cirillo;Christian Esposito
{"title":"Blockchain-Enhanced PUF Authentication for IoT Devices","authors":"Mario Barbareschi;Franco Cirillo;Christian Esposito","doi":"10.1109/TETC.2026.3696088","DOIUrl":"https://doi.org/10.1109/TETC.2026.3696088","url":null,"abstract":"The widespread use of Internet of Things (IoT) devices in various critical settings highlights the importance of robust authentication mechanisms to safeguard applications from misuse and breaches. Traditional authentication schemes rely on cryptographic protocols to ensure high levels of security. However, their effectiveness depends on maintaining the confidentiality of cryptographic keys and faces challenges when deployed on devices with limited resources. This paper presents a new approach for designing an authentication scheme that eliminates the need for storing keys in device memory and operates without a centralized authority. We propose a lightweight mutual authentication scheme that leverages Static Random Access Memory (SRAM)-based Physical Unclonable Function (PUF), utilizing the inherent randomness generated during SRAM manufacturing to create keys. The solution is further strengthened with blockchain technology, enabling decentralized management and authority. This research proposes a new secure authentication protocol for IoT-enabled critical industrial applications by incorporating decentralization, scalability, freshness, and non-repudiation. We evaluate the time and resource consumption of our implementation on the ATmega328P chip, which has limited resources with 2 KB of SRAM and 32 KB of flash memory, and formally prove the scheme security using the Scyther tool.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 2","pages":"704-717"},"PeriodicalIF":5.4,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11540392","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148236385","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Biswajit Maity;Mohammad S. Obaidat;Shubham Jain;Sugnik Mukherjee;Subrata Nandi;Sanghita Bhattacharjee
{"title":"SonicOnEdge:A Real-Time Contextual Noise Mapping System on Edge Using GridCNN Model","authors":"Biswajit Maity;Mohammad S. Obaidat;Shubham Jain;Sugnik Mukherjee;Subrata Nandi;Sanghita Bhattacharjee","doi":"10.1109/TETC.2026.3689872","DOIUrl":"https://doi.org/10.1109/TETC.2026.3689872","url":null,"abstract":"Noise maps provide city-scale perception of noise levels. However, existing mapping systems suffer from several limitations: They mostly rely on historical data, lack precise noise-source contextual information, and perform audio processing in the cloud, creating only near real-time noise maps. In this work, we explore whether audio sensing and processing can both be performed on edge devices, enabling the creation of dynamic noise maps with real-time contextual visualization. The core challenge is to design a lightweight audio classification model that runs on edge devices without compromising performance. An end-to-end prototype system has been designed for detecting vehicular honks and their subclassification in terms of vehicle type. This work designs a deep learning model, GridCNN, that takes spectrogram images of 1-sec audio samples and outperforms existing audio classification algorithms (13.23% higher accuracy) using 63.14% fewer parameters and consuming 84.21% less memory. The model deployed on a Raspberry Pi Zero 2 W edge device using TensorFlow Lite achieves 94.62% test accuracy. Suitable real-time visualization of honk information has been created on maps. For model training, suitable honk datasets (56290 samples) were prepared by collecting and annotating in-house audio data using a smartphone sensor under different traffic scenarios. Honk-related contextual details can yield valuable insights to help municipal authorities devise appropriate traffic planning policies to curb noise pollution. The proposed GridCNN model may be generalized through suitable tuning and training to enable real-time classification of other outdoor noise sources (engine noise, firecrackers, loudspeakers, etc.) as well as indoor noise classes on edge devices.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 2","pages":"634-648"},"PeriodicalIF":4.8,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148507252","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Concept-Cognitive Neural Network for Fairness-Aware Maximal Cliques Identification","authors":"Fei Hao;Min Tao;Tao Zhang;Li Li;Jianrui Chen","doi":"10.1109/TETC.2026.3681615","DOIUrl":"https://doi.org/10.1109/TETC.2026.3681615","url":null,"abstract":"To alleviate the scalability bottleneck faced by Formal Concept Analysis (FCA) in mining fairness-aware maximal cliques in attributed social networks, this paper proposes a neuro-symbolic model termed Concept-Cognitive Neural Network (CCNN). Based on the equivalence between fair equiconcept and fairness-aware maximal clique in FCA, CCNN employs deep learning techniques to emulate the concept-generation process of FCA. Specifically, CCNN comprises three core modules: a node embedding encoder, a fair equiconcept upper-bound predictor, and a fair equiconcept generator. Extensive experiments were conducted on multiple random networks and four real-world datasets. The experimental results show that CCNN reduces the runtime on batch data to only 5%–8% of that required by symbolic methods such as RFCRefine, RFCAlter, and FCAMI. The study demonstrates that CCNN offers significant advantages in structural identification and network analysis, thus providing new insights for responsible computational social systems.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 2","pages":"515-527"},"PeriodicalIF":4.8,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148508884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 22-nm 4.92 TOPS/W End-to-End RNS DNN Accelerator for Edge-AI Devices","authors":"Vasilis Sakellariou;Vassilis Paliouras;Ioannis Kouretas;Hani Saleh;Thanos Stouraitis","doi":"10.1109/TETC.2026.3689523","DOIUrl":"https://doi.org/10.1109/TETC.2026.3689523","url":null,"abstract":"This work presents an end-to-end Residue Numbering System (RNS) Deep Neural Network (DNN) accelerator targeting edge-AI devices. The proposed architecture translates the intrinsic advantages of RNS—particularly the efficient implementation of multiply–add operations—into system-level power efficiency gains. This is made possible by the introduction of novel architectural features, such as the amortization of high-complexity RNS operations (base extension, activation, and scaling), and the integration of bespoke RNS low-power techniques, such as a clock-gating scheme that exploits the periodic usage of the high-complexity RNS units, and voltage scaling that exploits the RNS capability to achieve clock frequency constraints with smaller supply voltages. Tradeoffs between hardware performance metrics of RNS implementations for various operational scenarios and RNS bases have been systematically analyzed, and comparisons against a conventional positional binary implementation have been conducted, guiding the optimal selection of design space parameters. Silicon power measurements on the 22-nm FDSOI prototype chips underpin the theoretical analysis and simulation results, which show considerable benefits of RNS-based DNN processing. These prove that RNS can increase the maximum achievable frequency of arithmetic circuits and result in 1.34× more energy-efficient processing compared to conventional binary counterparts. Compared to the state-of-the-art RNS-based DNN accelerator, the proposed architecture is 9× more power efficient, reaching a peak power efficiency of 4.92 TOPS/W.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 2","pages":"604-618"},"PeriodicalIF":4.8,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148510061","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Skr-Tree: A Highly Responsive B-Tree on General Skyrmion Racetrack Memories","authors":"Yun-Shan Hsieh;Bo-Jun Chen;Po-Chun Huang;Wei-Kuan Shih;Yuan-Hao Chang","doi":"10.1109/TETC.2026.3666798","DOIUrl":"https://doi.org/10.1109/TETC.2026.3666798","url":null,"abstract":"Skyrmion racetrack memory (SK-RM) has become a promising memory medium in future computer systems, thanks to the exceptional access performance and storage density. Its unique features, such as the supports of parallel reads/writes and random inserts/deletes, create new opportunities to address the design challenges of existing data structures. In particular, directly storing a B-tree on SK-RM might result in occasional spikes in the latency when inserting a data item into the B-tree. The primary cause of the unstable performance is due to the inefficient node splitting procedure, in which nearly half of the data items of the overflowing node must be migrated to a new node. In this work, we present <italic>Skr-tree</i>, a highly responsive variant of B-tree for general SK-RMs. To reduce the worst-case latency of data item insertion, Skr-tree comes with a novel node splitting strategy called <italic>remapping split</i>, which modifies the node metadata to remap a part of the data items of an overflowing node to a new node. To accompany the remapping split strategy, Skr-tree is also equipped with a <italic>node rebalancing</i> strategy which amortizes the data item migration to different data item insert operations and reduces the instantaneous latency of node splitting. To validate the performance benefits of Skr-tree, a series of analytical and experimental studies have been performed, and the results are quite encouraging.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 2","pages":"379-396"},"PeriodicalIF":4.8,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148507245","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Low Power Consumption Software PUF Based on Video Coding Hardware for Image Frame Encryption","authors":"Tengfei Yuan;Pengjun Wang;Yuejun Zhang;Ziyu Zhou;Mingze Ren;Shuang Hu;Shutong Zhang","doi":"10.1109/TETC.2026.3696121","DOIUrl":"https://doi.org/10.1109/TETC.2026.3696121","url":null,"abstract":"Compared with traditional video coding algorithms, video coding hardware circuits have higher coding efficiency, faster transmission rate, smaller storage space. They are widely used in the Internet of Thing (IoT). Aiming at the problems of encoding hardware protection and privacy data security of video encoding hardware under the resource constrained IoT. This paper proposes a low power consumption Software Physical Unclonable Function (SPUF) based on video coding hardware. The proposed SPUF generates video coding hardware feature response under low voltage, and implements image data coding and data compression and transmission under normal voltage. Firstly, we use the video encoding hardware in the H265 IP core. Secondly, the transmission delay characteristics of video coding hardware under different voltages are analyzed. Combined with the sampling output principle between register groups, the response is dependent on the delay of register path to generate unclonable random data under the low voltage. The SPUF was finally verified on TSMC 65 nm. The results indicated that the SPUF response passed the NIST randomness test, with a randomness of 50.13%, an autocorrelation coefficient of 0.0181 at 95% confidence, and a power consumption of 78.38 fJ/bit. It has the characteristics of high security, low power consumption, and lightweight. To safeguard image-information transmission between IoT components and devices, this paper presents a lightweight encryption protocol founded on SPUF.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 2","pages":"691-703"},"PeriodicalIF":4.8,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148508175","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Online Scheduling With Incremental Reconfiguration in IEEE 802.1Qch-Based TSN for IIoT","authors":"Yuan-Yao Shih;Min-Chun Hsiao","doi":"10.1109/TETC.2026.3667727","DOIUrl":"https://doi.org/10.1109/TETC.2026.3667727","url":null,"abstract":"As the fourth industrial revolution progresses, the Industrial Internet of Things (IIoT) delineates a set of imperatives for network communication. In addition to the stringent requirement for real-time processing, there is a heightened focus on flexibility and scalability in industrial networks. Time-Sensitive Networking (TSN), a compliant extension of real-time Ethernet, holds promise for future IIoT wired communications. Nevertheless, the prevailing method for timing management, the Time-Aware Shaper (TAS) of TSN, imposes a significant computational burden when creating schedules to secure temporal assurances, potentially impeding its integration into dynamic, larger-scale environments. Cyclic Queuing and Forwarding (CQF), as specified in IEEE 802.1Qch, provides a simplified shaping approach to streamline the TSN framework. This paper examines the conundrum of incremental online scheduling in IEEE 802.1Qch-based TSN systems. We introduce an online reconfiguration algorithm predicated on the Tabu search metaheuristic to augment resource allocation flexibility. This approach facilitates reallocating network resources to verify the suitability of incoming data flows while preserving the plug-and-produce characteristic during operational periods. Performance evaluation demonstrates that our reconfiguration methodology can accommodate increased requests compared to conventional defensive tactics while incurring only a tolerable increase in response time overhead.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 2","pages":"397-413"},"PeriodicalIF":4.8,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148509042","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"SecTAG: A Semantic and Intent Representation Framework for Risk-Aware Hashtag Hijacking Detection","authors":"Zheng Qu;Chen Lyu;Chi-Hung Chi;Shi-Feng Sun","doi":"10.1109/TETC.2026.3689970","DOIUrl":"https://doi.org/10.1109/TETC.2026.3689970","url":null,"abstract":"With the expansion of social networks, hashtags are increasingly popular for search and recommendation as highlighted topics of text microblogs. However, since hashtags could be casually and unrestrictedly created by users, they are highly susceptible to hashtag hijack attacks, especially when associated with new commercial promotions that emerged on social networks. To address this issue, previous efforts either target only a few unique hijacks or extract features to match the content of the microblog to the hashtag. However, these approaches fail to distinguish between innocent hashtag usage by normal users and actual hashtag hijacks by attackers. In this paper, we propose SecTAG, a multi-task learning framework to fast detect the truly hostile attackers by revealing the commercial intentions of users. Our SecTAG consists of a three-task hijack detection model, a dynamic weighting scheme and a hijack risk assessment scheme. First, using a transformer encoder with a multi-task classifier, we design a three-task detection model that identifies microblogs whose content mismatches their hashtags, distinguishes benign hashtag usage, and ultimately detects hijacking attacks. Second, we develop a dynamic weighting scheme for optimizing multi-task loss function of our three-task detection model. Finally, we construct a hijack risk assessment scheme to compute the risk level of hashtags, which has been validated effectively on the real-world dataset. Extensive experiments demonstrate that SecTAG accurately detects hashtag hijacking attacks.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 2","pages":"619-633"},"PeriodicalIF":4.8,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148509459","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Tao Bai;Yuanqing Feng;Zhi Lu;Xueming Tang;Songfeng Lu;Yongquan Cui
{"title":"Practical and Robust Privacy-Preserving K-Means Clustering Protocols With GPU Acceleration","authors":"Tao Bai;Yuanqing Feng;Zhi Lu;Xueming Tang;Songfeng Lu;Yongquan Cui","doi":"10.1109/TETC.2026.3682714","DOIUrl":"https://doi.org/10.1109/TETC.2026.3682714","url":null,"abstract":"Privacy-preserving machine learning allows for the protection of the original data’s privacy while training models. In recent years, researchers have implemented machine learning algorithms using secure multi-party computation (MPC) techniques, with clustering being one of the key applications. However, current privacy-preserving clustering algorithms still face challenges regarding execution speed and communication overhead. In this paper, we propose a new three-party GPU-accelerated privacy-preserving K-means clustering algorithm aimed at improving computational efficiency in distributed settings. We design a three-party K-means algorithm and optimize subprotocols such as the truncation protocol and the constant-round comparison protocol to reduce communication latency. Additionally, we leverage the powerful capabilities of Graphics Processing Units (GPUs) to enhance the execution efficiency of the algorithm, particularly for intensive distance computation and centroid updates. Finally, we propose a privacy-preserving clustering quality evaluation protocol to address the parameter selection issue (determining the optimal number of clusters <inline-formula><tex-math>$K$</tex-math></inline-formula>) in privacy-preserving K-means. Experimental results on the synthetic datasets demonstrate that our method achieves a <inline-formula><tex-math>$137times$</tex-math></inline-formula>–<inline-formula><tex-math>$221times$</tex-math></inline-formula> improvement in efficiency compared to the CPU-based protocol of Mohassel et al., and a <inline-formula><tex-math>$5.7times$</tex-math></inline-formula>–<inline-formula><tex-math>$11.2times$</tex-math></inline-formula> speedup over the CPU-based state-of-the-art implementation by Wei et al.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 2","pages":"528-542"},"PeriodicalIF":4.8,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148507961","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"HTAM: High-Performance Ternary Approximate Multiplier Designs With Stage-Wise Optimization for Low PDP and High Accuracy","authors":"Aalelai Vendhan;Syed Ershad Ahmed;S. Gurunarayanan","doi":"10.1109/TETC.2026.3687573","DOIUrl":"https://doi.org/10.1109/TETC.2026.3687573","url":null,"abstract":"This paper presents the design and implementation of approximate ternary multipliers customized for error-resilient applications. Three 6 × 6 approximate ternary multipliers with optimizations at partial product generation (PPG), partial product reduction (PPR), and partial product accumulation (PPA) stages have been proposed. The design of 6 × 6 multipliers employs power-efficient 3 × 3 ternary sub-multipliers utilizing novel 1-trit approximate adder and multiplier as building block modules. Furthermore, a simple yet effective error correction circuit is integrated at the PPG level to enhance the accuracy of the multiplier. Results show that the proposed 1-trit approximate adder showcased 55% lesser PDP, and the proposed 1-trit approximate multiplier showed 68% lesser PDP compared to the best design available in the literature. The proposed 6 × 6 multiplier with approximation in the PPG stage shows a 92% lesser normalized error distance (NED), while the proposed 6 × 6 multiplier with approximation in the PPR stage exhibits a 48% power delay product (PDP) improvement when compared with the best design in the literature. Compared with all existing designs, the proposed TAM-G, TAM-R, and TAM-A designs have lower PDP × NED values, demonstrating that our designs enhance the multiplier’s performance without significantly sacrificing accuracy. Therefore, the proposed approach balances power efficiency and speed while preserving acceptable accuracy, optimizing the multiplier’s overall performance. We have implemented an image-blending application using the proposed multiplier architectures, and the results prove that the expected PSNR was achieved. Finally, these multipliers were also validated by using them in the design of an ML-driven spatial feature extraction model.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 2","pages":"557-569"},"PeriodicalIF":4.8,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148509439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}