{"title":"Fast high-definition video background completion using features tracking","authors":"Jocelyn Benoit, Eric Paquette","doi":"10.1109/ISPACS.2016.7824726","DOIUrl":"https://doi.org/10.1109/ISPACS.2016.7824726","url":null,"abstract":"This paper presents an automatic video background completion approach based on invariant features tracking and image registration to find valid replacement regions. Previous exemplar-based methods provide good results for low-resolution video sequences, but suffer from long computation times and large memory consumption for high-definition sequences. We first select a candidate frame to complete a missing region using invariant features tracking and image registration. This greatly reduces computation times as it does not require the lengthy nearest neighbor searches seen in typical video completion methods. To minimize registration errors, we introduce a fast validation approach. Then, we propose an exposure correction method based on histogram specification to eliminate illumination inconsistencies in the completed regions. Finally, we complete the missing region with a multi-band blending approach to minimize boundary discontinuities. Our approach can achieve good quality results on high-definition videos, and it can deal with a variety of real-life problems, such as non-trivial camera movement and illumination changes. Furthermore, the proposed method requires low computation times which represent a 24–54 times speedup over previous methods. In addition to providing specific implementation details, this paper presents experimental results on a variety of videos and compares them to state-of-the-art methods in terms of visual quality and performance.","PeriodicalId":131543,"journal":{"name":"2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","volume":"2 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126288716","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"QLB: QoS routing algorithm for Software-Defined Networking","authors":"Piyawit Tantisarkhornkhet, Warodom Werapun","doi":"10.1109/ISPACS.2016.7824704","DOIUrl":"https://doi.org/10.1109/ISPACS.2016.7824704","url":null,"abstract":"Software-Defined Networking (SDN) is a new efficiently idea of programmable networks that separates the control plane from data plane of all network devices. Internet service provider is responsible for all the control decisions and communication among the forwarding elements from centralized controller. SDN provides the various optimized services. Quality of service (QoS) routing is a path computation method that is suitable for the different traffics generated by several applications, while utilization of network resources has increased. This agreement of service is defined by QoS requirements such as throughput, delay, jitter and packet loss etc. Multimedia applications often require assured from multi QoS constrained, causing the NP-complete problem which cannot be simply solved in polynomial time and high management complexity in the transition network. SDN is able to reduce complexity and it is used to efficiently implement traffic, hence SDN significantly values to development QoS routing. In this paper, we propose QoS routing algorithm called Quantized Level Balance (QLB) for SDN that considers one or many QoS parameters relating to the network application. To satisfy the requirements, QLB selects QoS parameters depending to the level of appropriate application service quality. We have replicated our algorithm on simulate topology with Scalable Video-streaming Evaluation Framework (SVEF). We measure the Peak Signal-to-Noise Ratio (PSNR) and Mean Opinion Score (MOS) of Scalable Video Coding (SVC) at the receiver. Our propose algorithm is improved than single-metric approach that may choose poor QoS parameter paths.","PeriodicalId":131543,"journal":{"name":"2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126480001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Improving motorcycle anti-theft system with the use of Bluetooth Low Energy 4.0","authors":"W. Koodtalang, T. Sangsuwan","doi":"10.1109/ISPACS.2016.7824705","DOIUrl":"https://doi.org/10.1109/ISPACS.2016.7824705","url":null,"abstract":"This paper proposes the improvement of motorcycle anti-theft system (MATS) utilizing Bluetooth Low Energy (BLE) 4.0. In the our previous work, the couple RFID passive tags were installed on motorcycles to detect the larceny conditions. The main problem was found in the last experiments that the RFID tags attached with the ignition key cannot be hung flexibly. Therefore, the BLE4.0, which is the low-power-consumption device, is dangle on the motorcycle's key and the RFID tags is installed on the bike's hidden body. The anti lost devices have been applied for responsibility of BLE-tags slave mode, installed on a key. The HM-11 BLE 4.0 module combination with an Arduino board has a function as the master mode, reading the MAC address (called ID) of BLE slave devices. The results show that the maximum distance, in which the BLE master module can detect the BLE slave's ID, is approximately 18 meters. The proposed method is reliable because the BLE devices can be hung on the key together while the motorbike is running on the speed not over than 80km/hr. Finally, the experimental results guarantee that, when relatively compared with the previous method, accuracy of the MATS is improved efficiently; moreover, this proposed system can actually be used in the real situation at the Prachinburi province, Thailand.","PeriodicalId":131543,"journal":{"name":"2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116132996","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Tsuyoshi Makioka, Yuya Kuriyaki, K. Uchimura, T. Satonaka
{"title":"Quantitative study of facial expression asymmetry using objective measure based on neural networks","authors":"Tsuyoshi Makioka, Yuya Kuriyaki, K. Uchimura, T. Satonaka","doi":"10.1109/ISPACS.2016.7824702","DOIUrl":"https://doi.org/10.1109/ISPACS.2016.7824702","url":null,"abstract":"Previous studies have been reported that facial expressions on the left side of face appear stronger than these on the right side. We described an algorithm of an effective feature selection method based on supervised learning of multi-layer neural networks for facial expression recognition. We extracted the emotion masks focusing on perceptually significant pixels in a face image by using exhaustive searches based on the backward feature selection method. It provided an objective measure for evaluating the facial asymmetry. We demonstrated effectiveness of our approach in qualitative experiments for rating the asymmetric facial expressions. In the experiment, the left-right asymmetry of facial expressions has been proved objectively by using perceptually significant pixels within the emotion masks. The facial expression recognition rate using the emotions masks was improved from 78.8% to 83.1%.","PeriodicalId":131543,"journal":{"name":"2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125094224","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Sound source tracking via two microphones based on MUSIC using PSO","authors":"Kenta Omiya, K. Suyama","doi":"10.1109/ISPACS.2016.7824718","DOIUrl":"https://doi.org/10.1109/ISPACS.2016.7824718","url":null,"abstract":"In this paper, a method for multiple sound source tracking via two microphones is proposed. In our previous work, the summed MUSIC (MUltiple SIgnal Classification) spectrum was used as an evaluation function for PSO (Particle Swarm Optimization). Then, the penalty function is added to avoid the same direction tracking. However, the penalty function is fixed without the tracking situation. In the proposed method, the penalty function is calculated from the mixed Cauchy distribution is fitted to the denominator of MUSIC spectrum. The effectiveness of the proposed method is shown by several experimental results.","PeriodicalId":131543,"journal":{"name":"2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115154921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 2nd-order Delta Sigma AD modulator using dynamic amplifier and dynamic SAR quantizer","authors":"Chunhui Pan, H. San, Tsugumichi Shibata","doi":"10.1109/ISPACS.2016.7824725","DOIUrl":"https://doi.org/10.1109/ISPACS.2016.7824725","url":null,"abstract":"A proof-of-concept Delta Sigma AD modulator using dynamic analog components is designed and fabricated in 90nm CMOS technology. The measurement results of an experimental prototype demonstrate the feasibility of the proposed switched-capacitor (SC) architecture to realize a 2nd-order Delta Sigma AD modulator with ring amplifier based integrators and dynamic comparator based successive approximation register (SAR) quantizer. The integrators in the modulator are realized by ring amplifier without static current. Multi-bit quantizer and analog adder in the feedforward modulator is realized by a passive-adder embedded SAR analog-to-digital converter (ADC) which consists of capacitor array and a dynamic comparator. The dynamic comparator does not dissipate static power when a pre-amplifier is not used. Measurement results of peak SNDR=77.51dB and SNR=80.08dB are achieved while a sinusoid −1dBFS input is sampled at 12MS/s for the bandwidth is BW=94kHz. The total analog power consumption of the modulator is 0.37mW while the supply voltage is 1.1V.","PeriodicalId":131543,"journal":{"name":"2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128068913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Adiono, Mahendra Drajat Adhinata, Novi Prihatiningrum, Ricky Disastra, Rachmad Vidya Wicaksana Putra, A. H. Salman
{"title":"An architecture design of SAD based template matching for fast queue counter in FPGA","authors":"T. Adiono, Mahendra Drajat Adhinata, Novi Prihatiningrum, Ricky Disastra, Rachmad Vidya Wicaksana Putra, A. H. Salman","doi":"10.1109/ISPACS.2016.7824708","DOIUrl":"https://doi.org/10.1109/ISPACS.2016.7824708","url":null,"abstract":"In this paper, we propose an architecture design of Sum of Absolute Difference (SAD) based template matching for fast queue counter. The main idea of this architecture design are line delay and SAD processor array. Size of the line delay is 640×100, since the length of the source image is 640 pixels, the width of the template image is 100 pixels and specification of the template and source images are 640×480 and 40×100 pixels respectively. The processor array (PA) contains 40×100 SAD processing elements (PEs) that are mapped into horizontal structure. We synthesize and implement the proposed design in FPGA Altera DE2-115. It can reach 128.35 MHz as maximum frequency and occupies 59,899 memory bits; 17,158 registers and 17,411 combinationals. It needs 307,200 clock cycles to finish a single image. By using 100 MHz clock frequency, a single image processing can be conducted in 3.072 ms (325 fps). These results show that the proposed design can reach fast computational performance.","PeriodicalId":131543,"journal":{"name":"2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133300771","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Simulation study for FFT-based Expand-Truncate equalizer under the measured outdoor channels","authors":"Jia-Chyi Wu, Chi-Min Li, J. Huang","doi":"10.1109/ISPACS.2016.7824756","DOIUrl":"https://doi.org/10.1109/ISPACS.2016.7824756","url":null,"abstract":"For a W-CDMA system, an equalizer is applied at the receiver to reinstate the orthogonality of the spreading code. To improve the system performance of an equalizer, we may increase the number of taps of the equalizer to a limit due to hardware and computational complexity consideration. In this study, we have considered a FFT-based circulant equalizer with tapering method to improve system performance in a high SNR wireless channel scenario with a trivial complexity. We have also compared the system performance with the Conjugate Gradient (CG) method to the DMI method.","PeriodicalId":131543,"journal":{"name":"2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115073612","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Matsumura, K. Imamura, Yoshifumi Kawamura, Y. Matsuda
{"title":"Automatic rule registration and deletion function on a packet lookup engine LSI","authors":"T. Matsumura, K. Imamura, Yoshifumi Kawamura, Y. Matsuda","doi":"10.1109/ISPACS.2016.7824693","DOIUrl":"https://doi.org/10.1109/ISPACS.2016.7824693","url":null,"abstract":"A 100-MHz 51.2-Gb/s packet lookup engine LSI for packet inspection was proposed in a previous paper. High throughput and low power consumption was realized by introducing a combined mismatch detection circuit and linked-list hash table, minimizing the amount of memory accesses. The LSI has an automatic table update function. In this paper, this automatic rule registration and deletion function on the packet lookup engine LSI is described, meaning various tables included in the circuits, that is, the Mismatch Table, Index Table, and Rule Table are automatically configured by only inputting rules to be registered or deleted using embedded hardware on the LSI. This function utilizes a match and mismatch assessment for normal packet inspection operations.","PeriodicalId":131543,"journal":{"name":"2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114507450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"3D modeling based on multiple Unmanned Aerial Vehicles with the optimal paths","authors":"Leye Wei, Xin Jin, Zhiyong Wu","doi":"10.1109/ISPACS.2016.7824715","DOIUrl":"https://doi.org/10.1109/ISPACS.2016.7824715","url":null,"abstract":"Recently, advanced and automated devices are used for natural disasters project. Unmanned Aerial Vehicle (UAV) is considered as an advanced technology to be used in various areas where are hard for human to arrive at. This paper presents a novel method to build a 3D model of disaster areas based on multiple UAVs with the optimal paths. We divide disaster areas in-to key survey regions and normal survey regions based on partitioning the photo taken by a conventional satellite. Key survey regions which require a comprehensive survey contain much more complicated buildings and structures compared with those in normal survey regions. Some of the UAVs are used to comprehensively scan the key survey regions. The others are used to roughly scan the normal survey regions. All of the UAVs finish those scanning tasks in cooperation. A math model is built to find the optimal paths for multiple UAVs to scan the whole area with the minimum cost of time. The experimental results show that the number of photos reduces 41.07%, the scan time reduces 33.23% and the time consumed by building the 3D model reduces 38.75% compared with the other methods. To the best of our knowledge, the system is the first to use multiple UAVs to build 3D model.","PeriodicalId":131543,"journal":{"name":"2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121083454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}