IEEE Journal of Emerging and Selected Topics in Power Electronics最新文献

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Sensorless Controlled PM Flux Linkage Estimation of Direct-Drive DTP-SPMSGs Under Variable Speed Control 变速控制下直接驱动DTP-SPMSGs无传感器控制永磁磁链估计
IF 5.7 2区 工程技术
IEEE Journal of Emerging and Selected Topics in Power Electronics Pub Date : 2026-10-01 Epub Date: 2026-03-06 DOI: 10.1109/JESTPE.2026.3691037
Peng Wang;Z. Q. Zhu;Zhibin Feng
{"title":"Sensorless Controlled PM Flux Linkage Estimation of Direct-Drive DTP-SPMSGs Under Variable Speed Control","authors":"Peng Wang;Z. Q. Zhu;Zhibin Feng","doi":"10.1109/JESTPE.2026.3691037","DOIUrl":"https://doi.org/10.1109/JESTPE.2026.3691037","url":null,"abstract":"Permanent magnet (PM) flux linkage is critical for monitoring the state of PM in dual three-phase surface-mounted PM synchronous generators (DTP-SPMSGs). However, for direct-drive DTP-SPMSGs under sensorless control, where the blade speed is variable and completely depends on the wind speed, this leads to a variation in position error. This makes conventional PM flux linkage estimation methods ineffective, as the position error is no longer constant but dynamically coupled with operating speed. This article proposes a virtual flux linkage (VFL) injection-based method for online PM flux linkage estimation of DTP-SPMSGs under sensorless variable-speed operation. By injecting opposite VFL pulses into two position observers corresponding to two winding sets simultaneously, the response of the difference in observed positions between two sets can be utilized to construct a PM flux linkage estimation model, where the unknown terms, including time-varying position error, stator resistance, stator inductance, and inverter nonlinearity are totally canceled. The proposed method has been validated experimentally.","PeriodicalId":13093,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Power Electronics","volume":"14 5","pages":"6271-6286"},"PeriodicalIF":5.7,"publicationDate":"2026-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149097240","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Unified Compensation of Unbalanced AC Voltage and Ripple DC Voltage in Hybrid Microgrids With Bidirectional Interfacing Converter 双向接口变换器混合微电网交流电压和直流纹波电压不平衡的统一补偿
IF 5.7 2区 工程技术
IEEE Journal of Emerging and Selected Topics in Power Electronics Pub Date : 2026-10-01 Epub Date: 2026-03-12 DOI: 10.1109/JESTPE.2026.3692622
Xinqi Li;Xinwei Wei;Chunguang Ren;Jinde Wu;Yihe Wang;Duo Zhao;Xiaoqing Han;Peng Wang
{"title":"Unified Compensation of Unbalanced AC Voltage and Ripple DC Voltage in Hybrid Microgrids With Bidirectional Interfacing Converter","authors":"Xinqi Li;Xinwei Wei;Chunguang Ren;Jinde Wu;Yihe Wang;Duo Zhao;Xiaoqing Han;Peng Wang","doi":"10.1109/JESTPE.2026.3692622","DOIUrl":"https://doi.org/10.1109/JESTPE.2026.3692622","url":null,"abstract":"In order to improve the power quality of hybrid AC/DC microgrids, this article proposes a unified control strategy of the bidirectional interfacing converter (BIC) to simultaneously compensate the unbalanced AC voltage and secondary ripple DC voltage without using other independent power quality compensation equipment. The secondary frequency power transmission characteristics of the BIC under unbalanced AC voltage conditions and the inherent secondary frequency power of single-phase inverter loads are analyzed. A ripple power compensation circuit is introduced on the DC side of the BIC to enhance the system control freedom. The unified control strategy for compensating the unbalanced AC voltage and the secondary ripple DC voltage of the BIC is designed in detail. Besides, the capacitor design in the compensation circuit is analyzed quantitatively. Finally, an experimental platform was established to validate the proposed control strategy, which can utilize the power margin of the BIC to compensate for the unbalanced AC voltage and secondary ripple DC voltage in hybrid microgrids simultaneously.","PeriodicalId":13093,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Power Electronics","volume":"14 5","pages":"5797-5809"},"PeriodicalIF":5.7,"publicationDate":"2026-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149097279","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Adaptive Barzilai--Borwein-Based Separable Spline Kernel Neural Network Predictive Control for Three-Level NPC Converters 基于Barzilai- borwein的三电平NPC变换器的自适应样条核神经网络预测控制
IF 5.7 2区 工程技术
IEEE Journal of Emerging and Selected Topics in Power Electronics Pub Date : 2026-10-01 Epub Date: 2026-04-28 DOI: 10.1109/JESTPE.2026.3687718
Juncheng Zhang;Lin Qiu;Kaijie Xu;Xing Liu;Jien Ma;Youtong Fang
{"title":"Adaptive Barzilai--Borwein-Based Separable Spline Kernel Neural Network Predictive Control for Three-Level NPC Converters","authors":"Juncheng Zhang;Lin Qiu;Kaijie Xu;Xing Liu;Jien Ma;Youtong Fang","doi":"10.1109/JESTPE.2026.3687718","DOIUrl":"https://doi.org/10.1109/JESTPE.2026.3687718","url":null,"abstract":"The finite control-set model predictive control (FCS-MPC) deploys an accurate mathematical model to describe the system dynamics and achieve output trajectory tracking, but this method has inherent limitations, including strong dependence on the model and sensitivity to parameter. In response to these challenges, a separable spline kernel-based predictive control strategy is developed in this study that employs the B-spline basis functions to construct a neural network control model in place of the explicit mathematical model and incorporates an adaptive Barzilai–Borwein-based gradient update to ensure stable system dynamics while reducing computational burden. The proposed method achieves superior performance in metrics such as computation time and output harmonics compared with the conventional FCS-MPC method, while maintaining robustness under load variations, offering a new control paradigm for power electronic converters that alleviates dependence on accurate parameters. Finally, the Lyapunov stability of the proposed scheme is provided, and extensive simulations and experiments are conducted for three-level neutral-point-clamped (3L-NPC) converters, which validate the feasibility and interest of the proposed design.","PeriodicalId":13093,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Power Electronics","volume":"14 5","pages":"6233-6244"},"PeriodicalIF":5.7,"publicationDate":"2026-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149097722","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Women in Engineering 工程领域的女性
IF 5.7 2区 工程技术
IEEE Journal of Emerging and Selected Topics in Power Electronics Pub Date : 2026-10-01 Epub Date: 2026-10-07 DOI: 10.1109/JESTPE.2026.3736271
{"title":"Women in Engineering","authors":"","doi":"10.1109/JESTPE.2026.3736271","DOIUrl":"https://doi.org/10.1109/JESTPE.2026.3736271","url":null,"abstract":"","PeriodicalId":13093,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Power Electronics","volume":"14 5","pages":"6869-6869"},"PeriodicalIF":5.7,"publicationDate":"2026-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11723352","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149097861","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Compact PCB-Based Strong-Coupling Resonator for Oscillation Suppression of SiC MOSFETs 一种用于抑制SiC mosfet振荡的小型pcb强耦合谐振器
IF 5.7 2区 工程技术
IEEE Journal of Emerging and Selected Topics in Power Electronics Pub Date : 2026-10-01 Epub Date: 2026-02-23 DOI: 10.1109/JESTPE.2026.3667032
Yun-Hui Mei;Lu Wang;Yuqing Cui;Zhanpeng Liu;Gaojia Zhu;Zetian Yu;Chuyuan Liu;Longnv Li
{"title":"A Compact PCB-Based Strong-Coupling Resonator for Oscillation Suppression of SiC MOSFETs","authors":"Yun-Hui Mei;Lu Wang;Yuqing Cui;Zhanpeng Liu;Gaojia Zhu;Zetian Yu;Chuyuan Liu;Longnv Li","doi":"10.1109/JESTPE.2026.3667032","DOIUrl":"10.1109/JESTPE.2026.3667032","url":null,"abstract":"The high-speed switching of silicon carbide (SiC) power devices is often accompanied by voltage/current overshoot and high-frequency oscillation caused by circuit parasitics. Conventional solutions, such as RC snubber circuits or active gate drivers, often come at the cost of increased switching losses or system complexity. Meanwhile, RLC resonators face a trade-off between compactness and performance owing to weak coupling and large volume. To address these limitations, this article proposes a novel strongly coupled resonator topology based on parity-time (PT) symmetric theory. The main breakthrough is the achievement of a coupling coefficient exceeding 0.4 within a compact 9 cm3 volume, ensuring efficient energy transfer and oscillation suppression at the physical level. This article first constructs an RLC damping circuit with a strong-coupling topology, then integrates coupled-mode theory with circuit equations to establish a system energy model for guiding parameter design. Experimental results demonstrate a 77.15% reduction in turn-off <inline-formula> <tex-math>$V_{mathrm {ds}}$ </tex-math></inline-formula>, 77.78% in turn-off <inline-formula> <tex-math>$I_{mathrm {d}}$ </tex-math></inline-formula>, and 67.58% in turn-on <inline-formula> <tex-math>$I_{mathrm {d}}$ </tex-math></inline-formula> oscillations, with no significant additional loss. Compared to traditional methods, the proposed design provides improved oscillation suppression with low additional loss and compact size, offering a practical solution for high-speed SiC converters.","PeriodicalId":13093,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Power Electronics","volume":"14 5","pages":"6011-6021"},"PeriodicalIF":5.7,"publicationDate":"2026-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147279087","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimization of Disturbance Rejection Performance for AC--DC--AC Converters Based on Proportional Voltage Feedforward 基于比例电压前馈的AC-DC-AC变换器抗干扰性能优化
IF 5.7 2区 工程技术
IEEE Journal of Emerging and Selected Topics in Power Electronics Pub Date : 2026-10-01 Epub Date: 2026-04-08 DOI: 10.1109/JESTPE.2026.3680685
Peng Liu;Liang Shao;Xinyu Qi;Tiantuo He;Lisi Tian
{"title":"Optimization of Disturbance Rejection Performance for AC--DC--AC Converters Based on Proportional Voltage Feedforward","authors":"Peng Liu;Liang Shao;Xinyu Qi;Tiantuo He;Lisi Tian","doi":"10.1109/JESTPE.2026.3680685","DOIUrl":"10.1109/JESTPE.2026.3680685","url":null,"abstract":"To address the need for enhanced dynamic response of the DC-bus voltage and improved load power observation accuracy, this article proposes a direct capacitor power control (DCPC) strategy combined with proportional voltage feedforward. First, by introducing a proportional voltage feedforward loop, the strategy effectively suppresses the DC-bus voltage fluctuations in conventional DCPC. Simultaneously, a high-order linear extended state observer (H-LESO) is employed to achieve accurate observation of the load power, thereby enhancing the overall control performance of the system. Second, theoretical analysis based on small-signal modeling verifies the feasibility of the proposed method. Finally, experimental comparisons under three operating conditions validate the effectiveness and superiority of the proposed approach.","PeriodicalId":13093,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Power Electronics","volume":"14 5","pages":"6679-6690"},"PeriodicalIF":5.7,"publicationDate":"2026-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147664293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Hybrid Active Switched LC and Passive Capacitor Quadratic-Based High-Gain DC--DC Converter With Common Ground and Reduced Device Stress 一种混合有源开关LC和无源电容二次型高增益DC-DC转换器,共地和减小器件应力
IF 5.7 2区 工程技术
IEEE Journal of Emerging and Selected Topics in Power Electronics Pub Date : 2026-10-01 Epub Date: 2026-04-03 DOI: 10.1109/JESTPE.2026.3680675
Seshagiri Rao Vemparala;Mahmoud F. Elmorshedy;M. S. Bhaskar;Dhafer Almakhles;Jose Rodriguez
{"title":"A Hybrid Active Switched LC and Passive Capacitor Quadratic-Based High-Gain DC--DC Converter With Common Ground and Reduced Device Stress","authors":"Seshagiri Rao Vemparala;Mahmoud F. Elmorshedy;M. S. Bhaskar;Dhafer Almakhles;Jose Rodriguez","doi":"10.1109/JESTPE.2026.3680675","DOIUrl":"10.1109/JESTPE.2026.3680675","url":null,"abstract":"An active switched inductor (ASL)-based high-gain converter is used to achieve higher voltage gain; however, these ASL converters have the drawback of high-voltage spikes across the switches and no common ground between the input and output ports. To overcome these drawbacks, ASL with a capacitor (ASLC) network and passive switched capacitor (PSC) cells are combined as a hybrid to derive the proposed converter (APSLC). The ASLC and PSC networks are arranged such that voltage self-balance is achieved across the switches, and the APSLC produces quadratic-based high-voltage gain. It also achieves reduced voltage stress across the switches and diodes, a low current rating of the inductors, and a common ground between the input and output ports. The APSLC steady-state operation under CCM and DCM, the converter’s practicality, and the parameters’ design are discussed. A fair comparison is provided with state-of-the-art converters regarding voltage gain, voltage stress, component count, utilization of switches and diodes, and volume of inductors and capacitors. Finally, a laboratory prototype is developed for a 400 V output voltage to validate the theoretical claims of the APSLC converter.","PeriodicalId":13093,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Power Electronics","volume":"14 5","pages":"5526-5538"},"PeriodicalIF":5.7,"publicationDate":"2026-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147617434","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Hybrid Phase Opposite Disposition PWM With Improved Output Quality and Reduced Common-Mode Voltage for Coupled Ten-Switch Three-Phase Three-Level Inverter 耦合十开关三相三电平逆变器混合相对置PWM提高输出质量和降低共模电压
IF 5.7 2区 工程技术
IEEE Journal of Emerging and Selected Topics in Power Electronics Pub Date : 2026-10-01 Epub Date: 2026-04-16 DOI: 10.1109/JESTPE.2026.3684853
Xiaojun Deng;Hongliang Wang;Xi Gui;Mingyang Han;Botao Linghu;Yun Yang;Xiumei Yue
{"title":"Hybrid Phase Opposite Disposition PWM With Improved Output Quality and Reduced Common-Mode Voltage for Coupled Ten-Switch Three-Phase Three-Level Inverter","authors":"Xiaojun Deng;Hongliang Wang;Xi Gui;Mingyang Han;Botao Linghu;Yun Yang;Xiumei Yue","doi":"10.1109/JESTPE.2026.3684853","DOIUrl":"10.1109/JESTPE.2026.3684853","url":null,"abstract":"Due to the cost-effectiveness and high power density, the coupled ten-switch three-phase three-level inverter (TP-TLI) has been an attractive candidate in industry. However, it has high common-mode voltage (CMV) and low output quality when using the phase disposition pulsewidth modulation (PDPWM) for the coupled ten-switch TP-TLI. To address these issues, this article proposes a hybrid phase opposite disposition PWM (HPODPWM) based on hybrid-level modulation (HLM). First, the characteristics of PODPWM in traditional TP-TLIs are analyzed. A case that does not generate the undesired switching states, which cannot be generated by the ten-switch TP-TLI, is explored. This helps to improve the output quality. Second, the HLM concept, which generates positive, zero, and negative levels within one switching cycle, is proposed based on modulation wave decomposition. In the HPODPWM, the middle phase utilizes HLM, and the other phases adopt three-level modulation (3LM). The CMV of HPODPWM is naturally reduced by 33.3% compared with PDPWM for the ten-switch TP-TLI. Third, a neutral-point voltage (NPV) control method based on zero-sequence voltage (ZSV) injection is also proposed. It could balance the NPV under different modulation indexes and power factors (PFs) since the NP current is considered. Experimental results are carried out to validate the effectiveness of the proposed HPODPWM.","PeriodicalId":13093,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Power Electronics","volume":"14 5","pages":"5513-5525"},"PeriodicalIF":5.7,"publicationDate":"2026-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147695564","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
High Time Resolution DPWMs Based on the Rolling Subtraction Algorithm 基于滚动减法算法的高时间分辨率DPWMs
IF 5.7 2区 工程技术
IEEE Journal of Emerging and Selected Topics in Power Electronics Pub Date : 2026-10-01 Epub Date: 2026-03-13 DOI: 10.1109/JESTPE.2026.3673748
Xin Cheng;Zhitong Chen;Pengzhen Mi;Yongqiang Zhang
{"title":"High Time Resolution DPWMs Based on the Rolling Subtraction Algorithm","authors":"Xin Cheng;Zhitong Chen;Pengzhen Mi;Yongqiang Zhang","doi":"10.1109/JESTPE.2026.3673748","DOIUrl":"10.1109/JESTPE.2026.3673748","url":null,"abstract":"High time resolution is essential in digital DC–DC converters, but it is limited by physical implementation and resource consumption for basic delay unit-based digital pulsewidth modulators (DPWMs). This article proposes a novel DPWM architecture with high time resolution based on the idea of rolling subtraction. In this architecture, the time resolution is not equal to the basic delay as usual, but equal to the delay difference. Therefore, a high time resolution can be achieved by subtracting two delays with a small difference. Besides, two DPWMs with more functions, which are independent deadtime adjustment and switching frequency adjustment, are implemented. This article uses an Artix 7 field programmable gate array (FPGA) to implement the proposed DPWMs. The test results indicate that these DPWMs realize a high time resolution of 13 ps, a high bit width of 16–24, and a high linearity larger than 0.99954 at low resource cost.","PeriodicalId":13093,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Power Electronics","volume":"14 5","pages":"6080-6089"},"PeriodicalIF":5.7,"publicationDate":"2026-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147454452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Fault Diagnosis and Fault-Tolerant Control Method for Open-Circuit Fault of Excitation Winding Converter in DSEM Drive System DSEM驱动系统励磁绕组变换器开路故障诊断与容错控制方法
IF 5.7 2区 工程技术
IEEE Journal of Emerging and Selected Topics in Power Electronics Pub Date : 2026-10-01 Epub Date: 2026-04-27 DOI: 10.1109/JESTPE.2026.3687198
Yi Lu;Qingyun Chang
{"title":"A Fault Diagnosis and Fault-Tolerant Control Method for Open-Circuit Fault of Excitation Winding Converter in DSEM Drive System","authors":"Yi Lu;Qingyun Chang","doi":"10.1109/JESTPE.2026.3687198","DOIUrl":"10.1109/JESTPE.2026.3687198","url":null,"abstract":"This article proposes a fault location and fault-tolerant control method for the open-circuit fault of the excitation winding converter in the doubly salient electromagnetic motor (DSEM) drive system. First, by rearranging the placement of the excitation current sensor and analyzing the change characteristics of the sampled current values before and after the excitation winding converter open-circuit fault, the faulty switch is quickly located. Then, fault-tolerant control strategies for the armature winding and excitation winding converter are designed for open-circuit faults in the excitation winding converter switches at different locations. This ensures that the output torque of the DSEM remains unchanged before and after fault-tolerant control, thus guaranteeing smooth motor operation. Simultaneously, the switching moment of the armature winding converter control strategy is optimized after the occurrence of the excitation winding converter open-circuit fault, in order to prevent the motor from outputting negative torque during the switching process. The proposed method can rapidly locate the faulty switch in the excitation winding converter without the need for additional sensors. It ensures that the motor maintains a consistent output torque before and after fault-tolerant operation, thereby guaranteeing the load-carrying capability of the motor. Finally, experiments conducted on a 12/8 three-phase DSEM verify the effectiveness and practicality of the proposed method.","PeriodicalId":13093,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Power Electronics","volume":"14 5","pages":"6720-6731"},"PeriodicalIF":5.7,"publicationDate":"2026-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147752634","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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