{"title":"Novel DO-OTA based current-mode grounded capacitor multiplier","authors":"D. Kamath","doi":"10.1109/ICISC.2018.8398992","DOIUrl":"https://doi.org/10.1109/ICISC.2018.8398992","url":null,"abstract":"New DO-OTA based grounded capacitor multiplier circuit is proposed. The proposed capacitance multiplier is a current-mode circuit, where in DO-OTA based current copier circuit is used to sense the input current and scale it by a factor k such that a scaled version of input current flows through the grounded capacitor (Ic = Iin/k). The capacitor multiplier circuit is verified using TINA SPICE simulator.","PeriodicalId":130592,"journal":{"name":"2018 2nd International Conference on Inventive Systems and Control (ICISC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128884544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shabana T Pirjade, Sneha Sondkar, Neha K Pol, Chetana Shete, Sarah Shaikh
{"title":"User conventional root detection for indoor mall","authors":"Shabana T Pirjade, Sneha Sondkar, Neha K Pol, Chetana Shete, Sarah Shaikh","doi":"10.1109/ICISC.2018.8399047","DOIUrl":"https://doi.org/10.1109/ICISC.2018.8399047","url":null,"abstract":"Indoor navigation systems help people navigate inside large buildings such as shopping malls. In this paper, a smart location-based mobile shopping application for Android devices is proposed. The flow of the application is that user searches a product, and then INOP (Indoor Navigation and Online Payment) identifies the location and searches the product inside the shopping mall. To make the navigation system, this paper proposes Shortest Path Algorithm. To add product in the cart, the user should scan bar code of the product with their android phone. Once the shopping is done by user, the user can make payment online.","PeriodicalId":130592,"journal":{"name":"2018 2nd International Conference on Inventive Systems and Control (ICISC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126814879","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A survey on miscellaneous attacks in Hadoop framework","authors":"Akshay Kumar Suman, Manasi Gyanchandani, Priyank Jain","doi":"10.1109/ICISC.2018.8398961","DOIUrl":"https://doi.org/10.1109/ICISC.2018.8398961","url":null,"abstract":"The world is progressing towards innovative advancement step by step bringing about an exponential rise in data. This enormous volume of data has presented the possibility of Big data, which has caught the consideration of business and IT researchers as a gift and a source of various opportunities for extensive associations. Securing this enormous measure of information has turned into an extraordinary concern in the field of data and communication technology. Hadoop, as an open-source distributed computing and Big data framework, is progressively utilized as a part of the business world, however the imperfection of security mechanism now ends up noticeably one of the fundamental issues obstructing its improvement. This paper depicts the different attack in detail which is possible on the Hadoop framework. The objective of this paper is to draw out an overview on the security risk and their identification technique in the Hadoop environment.","PeriodicalId":130592,"journal":{"name":"2018 2nd International Conference on Inventive Systems and Control (ICISC)","volume":"129 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115007793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Music recommendation based on content and collaborative approach & reducing cold start problem","authors":"Parmar Darshna","doi":"10.1109/ICISC.2018.8398959","DOIUrl":"https://doi.org/10.1109/ICISC.2018.8398959","url":null,"abstract":"Nowadays, Recommendation becomes the most popular area for many researchers. The main aim of recommendation is to provide meaningful suggestions to users for particular item based on users past interest and behaviors towards items. There are two most popular recommendation algorithm is 1) Content-Based Filtering 2) Collaborative Filtering. Content-Based method recommends music based on user data. Collaborative method uses rating and content sharing between different users to recommend music. Here, to provide music recommendation by content-based method music subjective features Speechiness, loudness, Acoustiness etc. are analyzed. The extracted features are stores into database by using Kmean clustering algorithm. For Content-based method, whenever user fires query to database music feature attribute value compares with clusters centroid. Once attribute value match, music can be recommended to user as Content-based method. For collaborative method, rating given by user to particular music is considered and adjusted cosine similarity is used to find similarity between user-user. Once similarity found, prediction rating algorithm is used to provide recommendation to user. Cold-start is most common problem for new user. Here, most popular tracks are recommending to user to solve it.","PeriodicalId":130592,"journal":{"name":"2018 2nd International Conference on Inventive Systems and Control (ICISC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115344826","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A high speed fully differential dynamic comparator for use in pipelined A/D converters","authors":"Md Noorullah Khan, Gabar Othman, Haneef Saheb","doi":"10.1109/ICISC.2018.8399023","DOIUrl":"https://doi.org/10.1109/ICISC.2018.8399023","url":null,"abstract":"This paper proposes the design of dynamic comparator for high speed Analog to Digital converters (ADCs). It features larger input swing, less sensitivity to common mode voltage and simple relationship between input and reference, and has low power dissipation. It is implemented in 0.18μm CMOS Technology. The simulation results are done in Cadence environment.","PeriodicalId":130592,"journal":{"name":"2018 2nd International Conference on Inventive Systems and Control (ICISC)","volume":"100 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120976352","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Performance improvement for DC boost converter with fuzzy controller","authors":"J. A. Ganeswari, R. Kiranmayi","doi":"10.1109/ICISC.2018.8399094","DOIUrl":"https://doi.org/10.1109/ICISC.2018.8399094","url":null,"abstract":"This paper presents the improved performance of a fuzzy PD controller than a conventional PD controller to control DC-DC Converter. The experimentation in fuzzy domain using five and seven membership functions with the proposed input and output variables. A fuzzy controller can be implemented where linear control techniques fail. The experimental results of the proposed boost converter using fuzzy control are evaluated in comparison with PD controller. All the analysis and simulations were performed using MATLAB software. The comparison of both the results indicate that the fuzzy controller is able to obtain better dynamic response. The results confirm the capability of the control methods in the improvement of the above-mentioned converter functioning.","PeriodicalId":130592,"journal":{"name":"2018 2nd International Conference on Inventive Systems and Control (ICISC)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127446685","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and analysis of high speed and low power 6-bit flash ADC","authors":"N. Kalyani, M. Monica","doi":"10.1109/ICISC.2018.8398897","DOIUrl":"https://doi.org/10.1109/ICISC.2018.8398897","url":null,"abstract":"This paper proposes a high speed and low power 6 bit flash Analog to Digital Converter (ADC) architecture. It comprises of a simple two-transistor based Threshold Inverter Quantizer (TIQ) comparator, modified sample and hold circuit; and ROM encoder. The area and power consumed by the overall ADC architecture is reduced since the comparator transistor count is minimized to two. Existing non-clocked comparators are redesigned and analyzed for appropriate comparison with the proposed comparator. The 6 bit flash ADC consumes a total power of 8.8 mW at an operating speed of 2 GHZ while a single two-transistor based TIQ comparator consumes 0.8679 nW power and has a propagation delay of 46.31 ps for a supply voltage of 1.8 V. The design is implemented in Cadence Virtuoso analog design environment using 180 nm CMOS technology.","PeriodicalId":130592,"journal":{"name":"2018 2nd International Conference on Inventive Systems and Control (ICISC)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114893627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design, implementation and verification of 32-Bit ALU with VIO","authors":"D. A. Devi, L. Sugun","doi":"10.1109/ICISC.2018.8399122","DOIUrl":"https://doi.org/10.1109/ICISC.2018.8399122","url":null,"abstract":"Any Digital design can be represented as RTL form by using either VHDL or Verilog_HDL. Such designs can be simulated, synthesized, implemented and finally can be verified by using popular front end tool Xilinx and FPGA development boards. In such cases, if the design specification is large enough to face the difficulty to verify the functionality on the target board, then we can use the virtual I/O concept. The Virtual Input/Output (VIO) debug feature can both monitor and drive internal FPGA signals in real time. This feature is used when there is no possibility to access on physical input and output devices on the target hardware, we can use this debug feature to drive and monitor signals that are present on the real hardware. In the proposed work a 32-bit ALU is designed simulated and verified through VIO. This work is designed with Verilog HDL, and implemented with Xilinx Vivado System Design Suite 2017.1 and Nexys DDR4 FPGA development board is used.","PeriodicalId":130592,"journal":{"name":"2018 2nd International Conference on Inventive Systems and Control (ICISC)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115051244","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Variable frequency start of PMSM motor based on STM32f407","authors":"A. Basera, D. Vora","doi":"10.1109/ICISC.2018.8399062","DOIUrl":"https://doi.org/10.1109/ICISC.2018.8399062","url":null,"abstract":"This paper presents a simple sensor less starting method of Permanent Magnet Synchronous Motor (PMSM). An open loop control based on variable supply frequency is implemented to operate PMSM at different speeds. Basic theory of Space Vector PWM is discussed and implemented with a 32 bit STM32f407 microcontroller. A three leg inverter is designed to control PMSM. Starting and running characteristics of PMSM is discussed.","PeriodicalId":130592,"journal":{"name":"2018 2nd International Conference on Inventive Systems and Control (ICISC)","volume":"105 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122438668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An approach to enhance the safety and security of EPC Class-1 generation-2 UHF RFID systems","authors":"Rahma Ben Fraj, V. Beroulle, N. Fourty, A. Meddeb","doi":"10.1109/ICISC.2018.8398977","DOIUrl":"https://doi.org/10.1109/ICISC.2018.8398977","url":null,"abstract":"UHF RFID (Radio Frequency Identification) is one of the most rising technologies in the automatic identification field. With the advantages of long distance, high speed and low cost communication, it will become a fundamental technology of our future society. The RFID-based applications that are related to personal information, require a practical solution to the privacy protection. However, the wireless communication between the RFID reader and the RFID tag is based on electromagnetic radiations, which are fully accessible by adversaries, and also make the communication not robust. In this paper, we present our approach to evaluate the RFID systems taking into account these two aspects: security and safety. This approach focuses on validating secure and robust UHF RFID systems considering the whole system in the presence of faults in real environment. Also, it will guide us to distinguish the most sensitive system components in order to facilitate developing low cost more secured and robust tag architectures. This paper explains why and how we plan to evaluate and improve robustness and security of UHF RFID systems.","PeriodicalId":130592,"journal":{"name":"2018 2nd International Conference on Inventive Systems and Control (ICISC)","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114601387","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}