{"title":"Evaluation of 15-420 kV substation lightning arresters after 25 years of service","authors":"S. Grzybowski, G. Gao","doi":"10.1109/SECON.1999.766151","DOIUrl":"https://doi.org/10.1109/SECON.1999.766151","url":null,"abstract":"Surges caused by lightning and switching overvoltages in power systems continue to be a major loss for electrical utilities and customers. To reduce the losses of power system equipment caused by lightning and switching surges and to improve the reliability of power system operations, it is particularly important to evaluate the lightning arrester performances after some specified years of service. In this paper, some gapped SiC arresters rated from 15 kV to 420 kV have been evaluated after being in service for 25 years. According to ANSI/IEEE Std. C62.1-1984 and IEEE C62.11-1989 standards, power-frequency sparkover voltage, maximum 1.2/50 /spl mu/s lightning impulse sparkover voltage and front-of-wave impulse sparkover voltage have been studied. It is found that some of the tested arresters were still fitting well with the standard requirements, while some of them failed the evaluation. If these arresters are still to be used in power systems, it is a great economical benefit for utilities and customers. At the end of this paper, some failure reasons regarding gapped SiC arresters are discussed.","PeriodicalId":126922,"journal":{"name":"Proceedings IEEE Southeastcon'99. Technology on the Brink of 2000 (Cat. No.99CH36300)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126056120","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Improved quadtree decomposition/recomposition algorithm for fractal image compression","authors":"W. Mahmoud, D. J. Jackson","doi":"10.1109/SECON.1999.766136","DOIUrl":"https://doi.org/10.1109/SECON.1999.766136","url":null,"abstract":"We present a fractal image compression algorithm that combine aspects of the classical quadtree decomposition (QD) scheme and the quadtree recomposition scheme (QR) proposed by the authors in earlier papers. For all types of images, the new approach exhibits a superior runtime performance when compared to both the QD and QR schemes, while maintaining high fidelity for compressed images. Quantitative results that include the attained compression ratio, signal-to-noise ratio (SNR), and runtime performance are presented.","PeriodicalId":126922,"journal":{"name":"Proceedings IEEE Southeastcon'99. Technology on the Brink of 2000 (Cat. No.99CH36300)","volume":"626 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123338506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of a distance education system","authors":"S. Lanka., M. Tanik, D. Green","doi":"10.1109/SECON.1999.766108","DOIUrl":"https://doi.org/10.1109/SECON.1999.766108","url":null,"abstract":"The authors started with a simple set of requirements to design and implement a distance education system as part of a masters thesis. In this paper, they present the conceptual framework of their approach. Their initial requirements were as follows: the student should: (a) select department and the course; (b) see the information on any course selected; (c) login to enter a selected course; (d) login from the Web; (e) should be validated; (f) should then be able to see content and the submissions; (g) be able to see notes, articles, audio and video; (h) be able to see exams, exercises and projects; and (i) have his/her professor able to see what the student sees.","PeriodicalId":126922,"journal":{"name":"Proceedings IEEE Southeastcon'99. Technology on the Brink of 2000 (Cat. No.99CH36300)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122957268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A prototype unit for built-in self-test of analog circuits","authors":"B. Lewis, S. Lim, R. Puckett, C. Stroud","doi":"10.1109/SECON.1999.766128","DOIUrl":"https://doi.org/10.1109/SECON.1999.766128","url":null,"abstract":"The design, implementation, and operation of a prototype assembly used to evaluate and demonstrate a mixed-signal based built-in self-test approach for analog circuits is described. Experimental results obtained from testing benchmark circuits using the prototype assembly are presented to illustrate results that cannot be easily obtained from a simulation environment.","PeriodicalId":126922,"journal":{"name":"Proceedings IEEE Southeastcon'99. Technology on the Brink of 2000 (Cat. No.99CH36300)","volume":"461 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124552266","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"In-system reprogrammable (ISR) units provide dynamic online automation and control","authors":"S. Wunnava, R. Hanif","doi":"10.1109/SECON.1999.766095","DOIUrl":"https://doi.org/10.1109/SECON.1999.766095","url":null,"abstract":"In modern control systems, there is a tremendous demand and requirement to implement the necessary control dynamically and also remotely. In addition, with the availability of the programmable devices such as complex programmable logic devices (CPLD) and field programmable gate arrays, it is now possible to design the systems with these type of devices and reprogram them online from remote locations. In this paper, the authors discuss the nature of the dynamic control methodology that is being followed and the model systems which are being implemented at the Florida International University Electrical and Computer Engineering Research Laboratories. The remote and dynamic control methodologies are implemented using the VHDL coding and remotely programming the CPLDs at the remote locations, using the VHDL code from host and network based data transfers.","PeriodicalId":126922,"journal":{"name":"Proceedings IEEE Southeastcon'99. Technology on the Brink of 2000 (Cat. No.99CH36300)","volume":"123 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114709625","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Nishio, A. Tanaka, N. Yamamoto, Y. Kanada, R. Yamamoto
{"title":"A bit-rate control method for low bit-rate video coding based on high bit-rate period emphasis","authors":"K. Nishio, A. Tanaka, N. Yamamoto, Y. Kanada, R. Yamamoto","doi":"10.1109/SECON.1999.766099","DOIUrl":"https://doi.org/10.1109/SECON.1999.766099","url":null,"abstract":"A bit-rate control method for high-quality video distribution at low bit rates is proposed. That method involves first encoding the video signal with predetermined coding parameters and then dividing it into three periods of high, medium, and low coding rates. The periods of high coding rate are allocated bit rates equal to or greater than the transmission bit rate to improve image quality. Moreover, the bit rate for periods of low coding rate is lowered so that the bit rate allocated to periods of high coding rate can be made greater. Preliminary experiments show that this high coding rate period emphasis method is consistent with the characteristics of human vision. The results of subjective tests on image quality that were conducted on a video distribution system using the proposed method show that for a transmission bit rate of 128 kbps with the proposed bit rate control method, the image quality is equivalent to a fixed bit rate that is approximately 1.9 times higher.","PeriodicalId":126922,"journal":{"name":"Proceedings IEEE Southeastcon'99. Technology on the Brink of 2000 (Cat. No.99CH36300)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114809190","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Security analysis of the MPOA protocol","authors":"S. Rampal, C.X. Wang","doi":"10.1109/SECON.1999.766101","DOIUrl":"https://doi.org/10.1109/SECON.1999.766101","url":null,"abstract":"We discuss the security issues associated with the multiprotocol over ATM (MPOA) standard. The MPOA standard defines a protocol for sending Internet Protocol (IP) traffic over ATM networks in a way to efficiently utilize the fast switching capabilities of ATM networks, bypassing software based routers which are traditionally slow in performance. However the first version of this standard has not addressed any security issues. In any network of today, security related problems are a big concern for maintaining both application level and network level integrity. This paper addresses the security issues related to the current version of the MPOA standard. Security loopholes in this model are analyzed and possible solutions are proposed.","PeriodicalId":126922,"journal":{"name":"Proceedings IEEE Southeastcon'99. Technology on the Brink of 2000 (Cat. No.99CH36300)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134008464","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Correlating software modelling and hardware responses for VHDL and Verilog based designs","authors":"S. Wunnava, I. Sánchez","doi":"10.1109/SECON.1999.766105","DOIUrl":"https://doi.org/10.1109/SECON.1999.766105","url":null,"abstract":"Modern digital system designs have been predominantly software driven, using the hardware description languages. While there are many different types of the hardware description languages, the most commonly used are VHDL (very high-speed integrated circuit hardware description language) and the Verilog. Both lend themselves to the successful realizations of the digital systems. However, even the experienced designers are often confused about which one to use and their relative performance characteristics. The authors discuss the general features of both languages from a design standpoint. Also, VHDL and Verilog based coding are discussed and the design realizations and simulations of the results are presented. We present the case studies of fundamental digital units such as full adders, comparators, counters and shift registers and discuss the timing and other important aspects which can be integrated into the actual designs. Also, the authors present a working model for hardware realizations using the CPLD (complex programmable logic device) platforms of the software designs. While it is acceptable to functionally check the designs with simulations, in actual applications, there is a need for hardware realizations as well. There are instances where the program code is sequential and the simulation results are also sequential. However, with the present complexity of CPLDs, and FPGAs where some hardware elements can be synthesized in concurrence, there can be timing problems. The authors also examine such instances and provide an insight into the arbitration schemes for a reliable digital system realization.","PeriodicalId":126922,"journal":{"name":"Proceedings IEEE Southeastcon'99. Technology on the Brink of 2000 (Cat. No.99CH36300)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123440263","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Adaptive and delayless filtering system for sinusoids with varying frequency","authors":"T. Leung, S. Valiviita, S. Ovaska","doi":"10.1109/SECON.1999.766113","DOIUrl":"https://doi.org/10.1109/SECON.1999.766113","url":null,"abstract":"Accurate current reference is important for an active power filter to efficiently suppress harmonics caused by power electronics devices. The reference signal can be generated by applying an adaptive predictive filter to extract the sinusoidal primary signal from a noisy source. In this paper, the authors propose an FIR (finite impulse response) filter whose coefficients are updated by the LMS (least-mean-square) algorithm to construct the adaptive filtering system. A feedback is added to the adaptive filter structure to provide efficient operation with reduced computational complexity. Their adaptive filter can predict the primary sinusoid while considerably attenuating the harmonic components. Since adaptive prediction is applied, the prediction step remains accurate even if the frequency changes in time.","PeriodicalId":126922,"journal":{"name":"Proceedings IEEE Southeastcon'99. Technology on the Brink of 2000 (Cat. No.99CH36300)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123849303","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Dynamic system control using slack descriptor models","authors":"J. Porter, L. Holloway","doi":"10.1109/SECON.1999.766093","DOIUrl":"https://doi.org/10.1109/SECON.1999.766093","url":null,"abstract":"Various techniques have been developed for controlling dynamic systems subject to model or input uncertainties. The slack descriptor systems model proposed by Holloway (1993) addresses such uncertainties as well as systems that have observation cost (uncertainty due to lack of samples). Here we consider some preliminary approaches to the control of systems modeled by slack descriptors, and show simulation results for some simple models.","PeriodicalId":126922,"journal":{"name":"Proceedings IEEE Southeastcon'99. Technology on the Brink of 2000 (Cat. No.99CH36300)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122608423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}