2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)最新文献_第7页

Dependable integrated clinical system architecture with runtime verification 可靠的集成临床系统架构与运行时验证

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-13 DOI: 10.5555/3199700.3199831

Yu Jiang, Mingzhe Wang, Han Liu, Mohammad Hosseini, Jiaguang Sun

{"title":"Dependable integrated clinical system architecture with runtime verification","authors":"Yu Jiang, Mingzhe Wang, Han Liu, Mohammad Hosseini, Jiaguang Sun","doi":"10.5555/3199700.3199831","DOIUrl":"https://doi.org/10.5555/3199700.3199831","url":null,"abstract":"Medical devices are essential for the practice of modern medicine, and the standard open-source integrated clinical environment (OpenICE) has been well designed and widely adopted to improve their interoperability. With OpenICE, it is easy to connect individual devices into the integrated clinical system to provide a coherent patient care. In this paper, we present ICERV, the first online verification approach for the OpenICE, to ensure the dependability (mainly for the safety and security) of the integrated system and the involved patient and clinician. The key idea is to customize runtime verification technique to provide a transparent verifying infrastructure to continually intercept the communication commands and messages of those devices, based on which, we can formalize the safety and security requirements as past time linear temporal logic expressions for verifier generation and online formal verification. If any requirements violate, predefined warnings or exception handling actions will be triggered timely to prevent hazards and threats. We have implemented and seamlessly integrated the approach without any changes to the source code of OpenICE nor the code of the upper-level applications or supervision, and the real device is used for evaluation to demonstrate the effectiveness.","PeriodicalId":126686,"journal":{"name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128557043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Power grid verification under transient constraints 暂态约束下的电网验证

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-13 DOI: 10.1109/ICCAD.2017.8203831

M. Fawaz, F. Najm

引用次数: 1

Why you should care about don't cares: Exploiting internal don't care conditions for hardware Trojans 为什么应该关心不关心:利用内部不关心硬件木马的条件

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-13 DOI: 10.1109/ICCAD.2017.8203846

Wei Hu, Lu Zhang, Armaiti Ardeshiricham, Jeremy Blackstone, Bochuan Hou, Yu Tai, R. Kastner

引用次数: 17

AdaLearner: An adaptive distributed mobile learning system for neural networks AdaLearner:用于神经网络的自适应分布式移动学习系统

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-13 DOI: 10.5555/3199700.3199739

Jiachen Mao, Zhuwei Qin, Zirui Xu, Kent W. Nixon, Xiang Chen, Hai Helen Li, Yiran Chen

{"title":"AdaLearner: An adaptive distributed mobile learning system for neural networks","authors":"Jiachen Mao, Zhuwei Qin, Zirui Xu, Kent W. Nixon, Xiang Chen, Hai Helen Li, Yiran Chen","doi":"10.5555/3199700.3199739","DOIUrl":"https://doi.org/10.5555/3199700.3199739","url":null,"abstract":"Neural networks hold a critical domain in machine learning algorithms because of their self-adaptiveness and state-of-the-art performance. Before the testing (inference) phases in practical use, sophisticated training (learning) phases are required, calling for efficient training methods with higher accuracy and shorter converging time. Many existing studies focus on the training optimization on high-performance servers or computing clusters, e.g. GPU clusters. However, training neural networks on resource-constrained devices, e.g. mobile platforms, is an important research topic barely touched. In this paper, we implement AdaLearner-an adaptive distributed mobile learning system for neural networks that trains a single network with heterogenous mobile resources under the same local network in parallel. To exploit the potential of our system, we adapt neural networks training phase to mobile device-wise resources and fiercely decrease the transmission overhead for better system scalability. On three representative neural network structures trained from two image classification datasets, AdaLearner boosts the training phase significantly. For example, on LeNet, 1.75–3.37X speedup is achieved when increasing the worker nodes from 2 to 8, thanks to the achieved high execution parallelism and excellent scalability.","PeriodicalId":126686,"journal":{"name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125162451","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

Redistribution layer routing for wafer-level integrated fan-out package-on-packages 用于晶圆级集成扇出封装的再分发层路由

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-13 DOI: 10.1109/ICCAD.2017.8203827

Ting-Chou Lin, Chia-Chih Chi, Yao-Wen Chang

{"title":"Redistribution layer routing for wafer-level integrated fan-out package-on-packages","authors":"Ting-Chou Lin, Chia-Chih Chi, Yao-Wen Chang","doi":"10.1109/ICCAD.2017.8203827","DOIUrl":"https://doi.org/10.1109/ICCAD.2017.8203827","url":null,"abstract":"The wafer-level integrated fan-out (InFO) package-on-package (PoP) is a promising 3D packaging technology, which usually consists of a bottom package with the InFO technique, and a top package stacked on the bottom package. Different from the traditional PoPs, there are frontside and backside redistribution layers (RDLs) in the InFO PoP for signal redistributions. To the best of our knowledge, there is still no previous work specifically tackling the RDL routing for the InFO PoP. Previous works on RDL routing mainly deal with the following three types of routing: the free-assignment, pre-assignment, and unified-assignment routing for single or multiple chips. In this paper, a new RDL routing problem for the InFO PoP is formulated. To remedy the deficiencies of lacking the interactions between frontside and backside RDLs, we present the first work in the literature to handle the unified-assignment multi-layer multi-package RDL routing problem (without RDL vias), considering layer assignment, layer number minimization, and total wirelength minimization. We propose an algorithm based on extracting increasing subsequences (IS), which transforms a routing sequence into two directed acyclic graphs (DAGs), namely, IS-DAG and Constraint-DAG. By minimizing the number of vertices on the longest path on the Constraint-DAG, we implicitly minimize the layer number. Furthermore, we perform backtracking on the IS-DAG to efficiently assign the connections to appropriate layers to avoid long detours. Experimental results show that our router can achieve 100% routablility for all given test cases, while the previous works with extensions fail all test cases even with more frontside RDLs.","PeriodicalId":126686,"journal":{"name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128409662","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

MeDNN: A distributed mobile system with enhanced partition and deployment for large-scale DNNs MeDNN：为大规模 DNN 提供增强分区和部署的分布式移动系统

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-13 DOI: 10.1109/ICCAD.2017.8203852

Jiachen Mao, Zhongda Yang, W. Wen, Chunpeng Wu, Linghao Song, Kent W. Nixon, Xiang Chen, Hai Helen Li, Yiran Chen

{"title":"MeDNN: A distributed mobile system with enhanced partition and deployment for large-scale DNNs","authors":"Jiachen Mao, Zhongda Yang, W. Wen, Chunpeng Wu, Linghao Song, Kent W. Nixon, Xiang Chen, Hai Helen Li, Yiran Chen","doi":"10.1109/ICCAD.2017.8203852","DOIUrl":"https://doi.org/10.1109/ICCAD.2017.8203852","url":null,"abstract":"Deep Neural Networks (DNNs) are pervasively used in a significant number of applications and platforms. To enhance the execution efficiency of large-scale DNNs, previous attempts focus mainly on client-server paradigms, relying on powerful external infrastructure, or model compression, with complicated pre-processing phases. Though effective, these methods overlook the optimization of DNNs on distributed mobile devices. In this work, we design and implement MeDNN, a local distributed mobile computing system with enhanced partitioning and deployment tailored for large-scale DNNs. In MeDNN, we first propose Greedy Two Dimensional Partition (GTDP), which can adaptively partition DNN models onto several mobile devices w.r.t. individual resource constraints. We also propose Structured Model Compact Deployment (SMCD), a mobile-friendly compression scheme which utilizes a structured sparsity pruning technique to further accelerate DNN execution. Experimental results show that, GTDP can accelerate the original DNN execution time by 1.86–2.44x with 2–4 worker nodes. By utilizing SMCD, 26.5% of additional computing time and 14.2% of extra communication time are saved, on average, with negligible effect on the model accuracy.","PeriodicalId":126686,"journal":{"name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127382265","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 63

An automated SAT-based method for the design of on-chip bit-flip detectors 基于自动sat的片上位翻转检测器设计方法

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-13 DOI: 10.1109/ICCAD.2017.8203766

Pouya Taatizadeh, N. Nicolici

引用次数: 1

Deep learning challenges and solutions with Xilinx FPGAs 基于赛灵思fpga的深度学习挑战与解决方案

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-13 DOI: 10.1109/ICCAD.2017.8203877

Elliott Delaye, Ashish Sirasao, Chaithanya Dudha, Sabya Das

引用次数: 10

A case for low frequency single cycle multi hop NoCs for energy efficiency and high performance 低频率单周期多跳noc的能效和高性能案例

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-13 DOI: 10.1109/ICCAD.2017.8203851

Monodeep Kar, T. Krishna

{"title":"A case for low frequency single cycle multi hop NoCs for energy efficiency and high performance","authors":"Monodeep Kar, T. Krishna","doi":"10.1109/ICCAD.2017.8203851","DOIUrl":"https://doi.org/10.1109/ICCAD.2017.8203851","url":null,"abstract":"As the number of cores in a multi-core system increase, network on-chip (NoC) latency and transmission energy scale unfavorably, since they are directly proportional to the number of hops traversed. Designers often have to trade-off energy to get lower latency (for instance long-distance bypass links with high-radix multi-stage routers) or latency to get lower energy (e.g., scaling down voltage and frequency of NoC routers and links). This work offers an alternate design-space for latency-energy optimization that has previously been unexplored, by harnessing the fact that lower frequency links can actually be used to transmit over longer on-chip distances within a cycle. We leverage a recently proposed micro-architecture that enables the construction of single-cycle multi-hop paths on the fly over a regular mesh network, and augment it with support for dynamic voltage and frequency scaling by decoupling router frequency from link frequency. In essence, we enable packets to traverse only wires from the source to the destination (as if it had a dedicated connection) only getting buffered at routers if necessary (at turns or due to contention). We address the synchronization challenges of multi-hop bypass setup signals in a multi-frequency domain and propose novel static/dynamic router and link frequency assignment techniques. Across synthetic as well as full-system benchmarks, we demonstrate reduced energy with similar or better run-times.","PeriodicalId":126686,"journal":{"name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114423505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Security trends and advances in manufacturing systems in the era of industry 4.0 工业4.0时代制造系统的安全趋势和进展

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Pub Date : 2017-11-13 DOI: 10.1109/ICCAD.2017.8203896

Sujit Rokka Chhetri, Nafiul Rashid, Sina Faezi, M. A. Faruque

引用次数: 56