2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM最新文献

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A 47–217 GHz dynamic frequency divider in SiGe technology SiGe技术中的47 - 217ghz动态分频器
2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM Pub Date : 2015-12-03 DOI: 10.1109/BCTM.2015.7340570
Jidan Al-Eryani, H. Knapp, Hao Li, K. Aufinger, J. Wursthorn, S. Majied, L. Maurer
{"title":"A 47–217 GHz dynamic frequency divider in SiGe technology","authors":"Jidan Al-Eryani, H. Knapp, Hao Li, K. Aufinger, J. Wursthorn, S. Majied, L. Maurer","doi":"10.1109/BCTM.2015.7340570","DOIUrl":"https://doi.org/10.1109/BCTM.2015.7340570","url":null,"abstract":"A divide-by-2 dynamic frequency divider with a frequency operating range from 47 up to 217GHz, i.e. a bandwidth of 170GHz, in a 130nm SiGe BiCMOS process with cut-off frequency fT =3D250 GHz is presented. To the best of authors' knowledge, this is the highest operating frequency and bandwidth reported so far in silicon. The divider is based on the regenerative frequency division principle followed by a buffer that can deliver ~-12.5dBm output power (no probe or waveguide/cable loss correction) at 217 GHz input frequency, which is sufficient to drive succeeding stages. The divider's correct functionality over its entire operating frequency range is verified with lab measurements.","PeriodicalId":126143,"journal":{"name":"2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122829958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Impact study of the process thermal budget of advanced CMOS nodes on SiGe HBT performance 先进CMOS节点制程热收支对SiGe HBT性能的影响研究
2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM Pub Date : 2015-12-03 DOI: 10.1109/BCTM.2015.7340558
V. T. Vu, T. Rosenbaum, O. Saxod, D. Céli, T. Zimmer, S. Frégonèse, P. Chevalier
{"title":"Impact study of the process thermal budget of advanced CMOS nodes on SiGe HBT performance","authors":"V. T. Vu, T. Rosenbaum, O. Saxod, D. Céli, T. Zimmer, S. Frégonèse, P. Chevalier","doi":"10.1109/BCTM.2015.7340558","DOIUrl":"https://doi.org/10.1109/BCTM.2015.7340558","url":null,"abstract":"The objective of this paper is to predict the main electrical characteristics of SiGe NPN HBTs, like the transit frequency fT, internal capacitances and pinched base sheet resistance for the next CMOS nodes by means of process and hydrodynamic simulations. The as-deposited BiCMOS055 vertical doping profile is exposed to the thermal budgets from existing CMOS040, CMOS028, CMOS028FDSOI and CMOS014FDSOI technologies by TCAD simulation. Obtained results show that, thanks to the reduction of the process thermal budget, the maximum fT could reach 370 GHz with two different assumptions: identical doping level at both BE and BC junctions and identical BE capacitance. Additionally, the evolution of the dopants' diffusion with ST's fabrication steps is clarified for BiCMOS055 in this study.","PeriodicalId":126143,"journal":{"name":"2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM","volume":"35 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120988270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A Ka-band 2×2 true-time-delay phased array receiver 一种ka波段2×2真时延相控阵接收机
2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM Pub Date : 2015-12-03 DOI: 10.1109/BCTM.2015.7340552
Q. Ma, D. Leenaerts
{"title":"A Ka-band 2×2 true-time-delay phased array receiver","authors":"Q. Ma, D. Leenaerts","doi":"10.1109/BCTM.2015.7340552","DOIUrl":"https://doi.org/10.1109/BCTM.2015.7340552","url":null,"abstract":"This paper presents an integrated Ka-band 2×2 True-Time-Delay (TTD) phased array receiver using a 0.25 nm SiGe:C BiCMOS technology. Each phased array receiver channel is able to perform 20.5 ps variable delay as well as 6 dB variable gain. A mixer and buffer are integrated to down-convert the RF signal into a fixed IF1 at 11 GHz. Each receiver channel presents more than 20 dB RF-IF1 conversion gain for a wide input RF frequency range from 25 to 34 GHz. The in-band worst case delay variation is 1.23 ps, i.e. 6% of the total variable delay. Within 25-34 GHz, the measured single channel input P1dB and IIP3 are better than -24 dBm and -16 dBm, respectively. The complete phased array receiver consumes 244 mW power, and has a total chip area of 2.6×2.6 mm2.","PeriodicalId":126143,"journal":{"name":"2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116113391","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Dual-band quad-core transformer coupled VCO with phase noise optimization 带相位噪声优化的双频四芯变压器耦合压控振荡器
2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM Pub Date : 2015-12-03 DOI: 10.1109/BCTM.2015.7340579
Rong Jiang, F. Dai, Feng Zhao, G. Niu, M. Hamilton, Jun Fu, Wei Zhou, Yudong Wang
{"title":"Dual-band quad-core transformer coupled VCO with phase noise optimization","authors":"Rong Jiang, F. Dai, Feng Zhao, G. Niu, M. Hamilton, Jun Fu, Wei Zhou, Yudong Wang","doi":"10.1109/BCTM.2015.7340579","DOIUrl":"https://doi.org/10.1109/BCTM.2015.7340579","url":null,"abstract":"This work presents a dual-band transformer-based voltage controlled oscillator (VCO) with phase noise optimization. Transformers consisting of four inductors are employed to reduce area. Four cross-coupled VCO cores are connected to the four wings of two pairs of transformers to allow individual control of the cores, whose mutual inductance is utilized to enhance the frequency tuning. Also, the capability of transformer coupling for phase noise reduction is demonstrated. The proposed transformer-based VCO can oscillate at two frequency bands centered at 1.9GHz and 3.6GHz with around 30% tuning range for each band. Experimental implementation in a 0.18 um SiGe BiCMOS technology demonstrates a measured phase noise of -114/119dBc/Hz and -115/120dBc/Hz at 1MHz offset for high and low bands, respectively.","PeriodicalId":126143,"journal":{"name":"2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM","volume":"322 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122786589","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Optimizing the vertical profile of SiGe HBTs to mitigate radiation-induced upsets 优化SiGe HBTs的垂直剖面,以减轻辐射引起的扰动
2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM Pub Date : 2015-12-03 DOI: 10.1109/BCTM.2015.7340576
Zachary E. Fleetwood, Brian R. Wier, U. Raghunathan, N. Lourenco, Michael A. Oakley, A. Joseph, J. Cressler
{"title":"Optimizing the vertical profile of SiGe HBTs to mitigate radiation-induced upsets","authors":"Zachary E. Fleetwood, Brian R. Wier, U. Raghunathan, N. Lourenco, Michael A. Oakley, A. Joseph, J. Cressler","doi":"10.1109/BCTM.2015.7340576","DOIUrl":"https://doi.org/10.1109/BCTM.2015.7340576","url":null,"abstract":"Profile optimization techniques are investigated for silicon-germanium heterojunction bipolar transistors (SiGe HBTs) intended for inverse-mode (IM) operation. IM device operation, also known as inverse active, involves electrically swapping the emitter and collector terminals and has been shown to improve the radiation tolerance of SiGe HBTs to single event transients (SETs). Multiple profile design variations are explored and trade-offs are analyzed with support of TCAD simulation. Modest design variations show marked improvement on IM performance while having minor impact on forward-mode (normal active) operation.","PeriodicalId":126143,"journal":{"name":"2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124028338","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 105-GHz, supply-scaled distributed amplifier in 90-nm SiGe BiCMOS 基于90nm SiGe BiCMOS的105 ghz电源级分布式放大器
2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM Pub Date : 2015-12-03 DOI: 10.1109/BCTM.2015.7340559
Kelvin Fang, Cooper S. Levy, J. Buckwalter
{"title":"A 105-GHz, supply-scaled distributed amplifier in 90-nm SiGe BiCMOS","authors":"Kelvin Fang, Cooper S. Levy, J. Buckwalter","doi":"10.1109/BCTM.2015.7340559","DOIUrl":"https://doi.org/10.1109/BCTM.2015.7340559","url":null,"abstract":"Distributed amplifiers (DAs) feature large bandwidth but relatively low gain and power efficiency. We present a supply-scaling technique to enhance the efficiency of a broadband DA. The presented eight-stage amplifier has a gain of 12 dB over a 3 dB bandwidth from 14-105 GHz and achieves peak output power of 17 dBm at 12.6% power-added efficiency (PAE) at 50 GHz. The DA is designed in a 90-nm SiGe BiCMOS process and occupies an area of 2.65 mm × 0.57 mm. Total dc power consumed is 297 mW.","PeriodicalId":126143,"journal":{"name":"2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM","volume":"305 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121403569","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Experimental and theoretical study of fT for SiGe HBTs with a scaled vertical doping profile 纵向掺杂比例分布SiGe HBTs的傅立叶跃迁实验与理论研究
2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM Pub Date : 2015-10-01 DOI: 10.1109/BCTM.2015.7340586
J. Korn, H. Rucker, B. Heinemann, A. Pawlak, G. Wedel, M. Schroter
{"title":"Experimental and theoretical study of fT for SiGe HBTs with a scaled vertical doping profile","authors":"J. Korn, H. Rucker, B. Heinemann, A. Pawlak, G. Wedel, M. Schroter","doi":"10.1109/BCTM.2015.7340586","DOIUrl":"https://doi.org/10.1109/BCTM.2015.7340586","url":null,"abstract":"The high frequency behavior of SiGe HBTs with a vertical doping profile tailored for high transit frequencies fT was investigated experimentally and theoretically for a series of layout configurations. For ft and fmax best values of 430 GHz and 315 GHz were measured on HBTs with an emitter area of 0.17 × 1.01 μm2. The contribution of device parasitics to the high frequency performance was investigated by means of compact models and device simulation. Measured doping and Ge profiles were used as input for one-dimensional device simulations with a Boltzmann transport equation solver. The results of these simulations were related to the measured characteristics of the actual devices using a compact model which accounts for the external parasitics of the real three-dimensional device.","PeriodicalId":126143,"journal":{"name":"2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134326571","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
A monolithically integrated opto-electronic clock converter in photonic SiGe-BiCMOS technology 光子SiGe-BiCMOS技术中的单片集成光电时钟转换器
2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM Pub Date : 2015-10-01 DOI: 10.1109/BCTM.2015.7340585
B. Krueger, R. Makon, O. Landolt, E. Krune, D. Knoll, S. Lischke, J. Schulze
{"title":"A monolithically integrated opto-electronic clock converter in photonic SiGe-BiCMOS technology","authors":"B. Krueger, R. Makon, O. Landolt, E. Krune, D. Knoll, S. Lischke, J. Schulze","doi":"10.1109/BCTM.2015.7340585","DOIUrl":"https://doi.org/10.1109/BCTM.2015.7340585","url":null,"abstract":"A novel monolithic opto-electronic clock converter integrated in a photonic SiGe-BiCMOS technology is presented, which turns an ultrashort optical pulse train generated by a hybrid mode-locked laser into a low-jitter electrical square wave with sharp transitions. The integrated circuit includes optical waveguides as well as grating couplers, a high-bandwidth (> 30 GHz) Ge-photodiode, a frequency divider-by-two implemented by SiGe bipolar transistors, photodiode characterization circuits and an optical monitoring path. The integrated circuit has been successfully tested at laser pulse repetition rates of up to 10 GHz. At this pulse repetition rate, the generated 5 GHz electrical square wave signal features a wideband phase noise floor <;-160 dBc/Hz and an jitter tj <; 1 fs while integrating the phase noise at offset frequencies between 2 kHz and 30 MHz.","PeriodicalId":126143,"journal":{"name":"2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128493803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 5 × 11.3 Gbit/s MZM driver array with a 6 Vpp output voltage swing and a chip-to-chip bondwire interface in SiGe bipolar technology 5 × 11.3 Gbit/s MZM驱动阵列,输出电压摆幅为6 Vpp,采用SiGe双极技术,采用片对片结合线接口
2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM Pub Date : 2015-10-01 DOI: 10.1109/BCTM.2015.7340565
H. Hettrich, M. Moller
{"title":"A 5 × 11.3 Gbit/s MZM driver array with a 6 Vpp output voltage swing and a chip-to-chip bondwire interface in SiGe bipolar technology","authors":"H. Hettrich, M. Moller","doi":"10.1109/BCTM.2015.7340565","DOIUrl":"https://doi.org/10.1109/BCTM.2015.7340565","url":null,"abstract":"A 5-channel driver array IC with a 6 Vpp differential output voltage swing in SiGe bipolar technology is presented. A pair of these arrays is designed to drive a 10-channel Mach-Zehnder modulator (MZM) in a photonic integrated circuit (PIC) of a 10 × 11.3 Gbit/s dense wavelength division multiplexing transmitter. The driver and PIC assembly is optimized for a low cost and a small footprint. Therefore, all required components, including the far-end terminations of the MZMs as well as an energy-efficient concept for flexible MZM biasing, are implemented on the driver IC. The close placement of the driver IC and the PIC with direct chip-to-chip bondwire interconnects reduces the footprint and improves signal quality. The performance of the driver array is demonstrated through measurements on a standalone and an integrated PIC assembly.","PeriodicalId":126143,"journal":{"name":"2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM","volume":"121 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132313695","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Efficient modeling of static self-heating and thermal-coupling in multi-finger SiGe HBTs 多指SiGe HBTs静态自热和热耦合的高效建模
2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM Pub Date : 2015-10-01 DOI: 10.1109/BCTM.2015.7340557
S. Balanethiram, A. Chakravorty, R. D’Esposito, S. Frégonèse, T. Zimmer
{"title":"Efficient modeling of static self-heating and thermal-coupling in multi-finger SiGe HBTs","authors":"S. Balanethiram, A. Chakravorty, R. D’Esposito, S. Frégonèse, T. Zimmer","doi":"10.1109/BCTM.2015.7340557","DOIUrl":"https://doi.org/10.1109/BCTM.2015.7340557","url":null,"abstract":"A computationally efficient model for static self-heating and thermal coupling in a multi-finger bipolar transistor is proposed. Compared to an existing state-of-the-art model, our model differs only in the implementation strategy keeping the physical basis intact. The formulated model is implemented in Verilog-A without using any voltage controlled voltage sources. Temperature dependence of the thermal resistances are considered within the framework of the model. The number of extra nodes in our model reduces to 2n from n2 required in the state-of-the-art model with n as the number of emitter fingers in a transistor. The simulation results of our model are found to be identical with those of the state-of-the-art model demonstrating the capability of accurately considering the static self-heating and thermal coupling in a simple way. The model is found to accurately predict the measured data of a five-finger transistor. It is found that in high current operating regimes, our five finger transistor model simulates around 11% faster compared with the state-of-the-art model.","PeriodicalId":126143,"journal":{"name":"2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127838213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
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