A. Donno, S. D’Amico, M. De Matteis, A. Baschirotto
{"title":"A 10-b 100-MSPS low power pipeline ADC for high energy physics experiments","authors":"A. Donno, S. D’Amico, M. De Matteis, A. Baschirotto","doi":"10.1109/PRIME.2013.6603152","DOIUrl":"https://doi.org/10.1109/PRIME.2013.6603152","url":null,"abstract":"A 10b 100-MS/s five-stage pipeline analog-to-digital converter (ADC) is implemented in 65nm digital CMOS process with power-reduction techniques for high energy physics experiments. It achieves 6.9dB signal-to-noise and distorsion ratio (SNDR). 8.5dB signal-to-noise ratio (SNR), 9.2 effective number of bits (ENOB) for a full-scale input sine at nyquist frequency. The ADC power consumption is 12.7mW from a 1.2V supply. It occupies 0.8mm2 die area.","PeriodicalId":125553,"journal":{"name":"Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124829825","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Transient analysis applying S-parameters as operators","authors":"H. Nuszkowski, R. Wolf, F. Ellinger, G. Fettweis","doi":"10.1109/PRIME.2013.6603110","DOIUrl":"https://doi.org/10.1109/PRIME.2013.6603110","url":null,"abstract":"We propose a calculation method for transient analysis of linear time-invariant systems basing on the Mikusinski operator. Since signal-flow charts and scattering parameters (S-parameters) are used to describe the networks to analyze, the method is very vivid. The applied S-parameters form operators describing transmission and reflection of power waves from one node to an other of the network's signal-flow chart. Although the usage of operators exhibits some similarities to the Laplace transform, the effect of the operators is interpreted in time domain, and a signal transformation is not required. Thus, the presented calculation method is suitable to vividly analyze dynamic processes on electrical lines.","PeriodicalId":125553,"journal":{"name":"Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128699400","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On the calculation of Hall factors for the characterization of electronic devices","authors":"V. Uhnevionak, A. Burenkov, P. Pichler","doi":"10.1109/PRIME.2013.6603159","DOIUrl":"https://doi.org/10.1109/PRIME.2013.6603159","url":null,"abstract":"In this work, a new method for the calculation of Hall factors is described. It is based on the interdependence with mobility components via the respective relaxation (scattering) times. The new method allows an accurate determination of mobility and carrier sheet concentration from Hall-effect measurements and can not only be applied to homogeneously doped substrates but also at the interfaces of electronic devices such as field-effect transistors. To demonstrate the general applicability of the method, we use it to predict the dependence of the Hall factor on dopant concentration in silicon and compare it with measured Hall factors reported in the literature.","PeriodicalId":125553,"journal":{"name":"Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128208537","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of a W-Band 2-bit differential CMOS phase shifter","authors":"A. Vahdati, M. Varonen, M. Karkkainen, K. Halonen","doi":"10.1109/PRIME.2013.6603111","DOIUrl":"https://doi.org/10.1109/PRIME.2013.6603111","url":null,"abstract":"This paper presents the design of a W-Band I-Q phase shifter and the corresponding simulation results in 28-nm CMOS technology. The design of passive components like a 90° hybrid and transformers needed to realize differential I-Q operation is shown. The phase of the RF signal can be varied from 0° to 270° in steps of 90°. The simulated input and output matching are better than -10 dB, and the maximum phase error is roughly 10° with a maximum output imbalance of 0.5 dB at 90 GHz using a 1-V supply voltage. The total power consumption is 41 mW and the die area is 0.46 mm2.","PeriodicalId":125553,"journal":{"name":"Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129599370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A nano-power power management IC for piezoelectric energy harvesting applications","authors":"M. Dini, M. Filippi, M. Tartagni, A. Romani","doi":"10.1109/PRIME.2013.6603169","DOIUrl":"https://doi.org/10.1109/PRIME.2013.6603169","url":null,"abstract":"This paper describes a power management IC for piezoelectric energy harvesting which integrates an active AC-DC converter with residual charge inversion together with a smart self-supply architecture to speed up the start-up phase and increase harvesting effectiveness. Due to randomness of available power and to its typical intrinsic limitation to tens of μW the IC has been carefully designed to reduce quiescent current down to 150 nA while the efficiency is estimated to be at least 81%. Moreover this allows the system to be fully autonomous even with very low input energy. The IC has been designed in a 0.32 μm BCD technology from STMicroelectrics and its area is 4.6 mm2.","PeriodicalId":125553,"journal":{"name":"Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127769776","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
B. Mohr, Jan Henning Mueller, Ye Zhang, R. Leys, S. Schenk, U. Bruening, S. Heinen
{"title":"High speed interface for digital centric transmitters","authors":"B. Mohr, Jan Henning Mueller, Ye Zhang, R. Leys, S. Schenk, U. Bruening, S. Heinen","doi":"10.1109/PRIME.2013.6603153","DOIUrl":"https://doi.org/10.1109/PRIME.2013.6603153","url":null,"abstract":"This paper presents a high-speed serial PLL-less interface suitable for usage in mobile transmitters. The interface uses current mode signaling to reduce both ground bouncing and the crosstalk impact on the mobile frontend. A digital controlled delay line is employed to adjust the sampling point of the highspeed serial clock. The data is 8b/10b encoded for word recovery and signaling of configuration packets. The interface is self-initializing and distinguishes between signal and configuration data. It consists of three lanes from the FPGA to the ASIC and one lane in backward direction to debug the internal ASIC signals. The interface is able to transfer up to 1.6 Gbit/s per lane. It consumes 3mA from a 1.2V supply.","PeriodicalId":125553,"journal":{"name":"Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","volume":"152 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134339386","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A metric driven verification and validation approach for Smart Power devices","authors":"O. Melnychenko, Hans-Peter Kreuter","doi":"10.1109/PRIME.2013.6603177","DOIUrl":"https://doi.org/10.1109/PRIME.2013.6603177","url":null,"abstract":"We propose a method for the pre-silicon metric driven verification and post-silicon validation of automotive Smart Power devices. The method is based on extending the UVM architecture with hardware drivers and monitors. We present the implementation of the hardware test bench components and the required software interfaces. The method is finally demonstrated by verifying a serial interface of a high-side power switch showing promising results.","PeriodicalId":125553,"journal":{"name":"Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","volume":"234 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114542657","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A wideband planar microstrip to coplanar stripline transition (balun) at 35 GHz","authors":"J. Leufker, A. Strobel, C. Carta, F. Ellinger","doi":"10.1109/PRIME.2013.6603166","DOIUrl":"https://doi.org/10.1109/PRIME.2013.6603166","url":null,"abstract":"A novel approach for wideband planar baluns is presented, which enables the realization with just two instead of three transmission lines. The analysis of the principle of operation and a suitable design procedure are described. Measurement results of test structures are compared to EM simulations. Two variants of this balun were designed for a center frequency of 35 GHz. Measurements show an absolute 3 dB-back-to-back insertion loss bandwidth of 16.7 GHz and 10.1 GHz with minimum losses of 0.38 dB and 0.71 dB respectively. The extrapolated absolute 1 dB insertion loss bandwidths of the single baluns are 14.5 GHz and 14.4 GHz respectively.","PeriodicalId":125553,"journal":{"name":"Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115789266","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Wireless energy and data transfer for neural recording and stimulation applications","authors":"G. Yilmaz, C. Dehollain","doi":"10.1109/PRIME.2013.6603156","DOIUrl":"https://doi.org/10.1109/PRIME.2013.6603156","url":null,"abstract":"This study presents design and implementation of a wireless energy and transfer system. The system is targeted to work in accordance with neural recording and stimulation purposes, more specifically for in-vivo epilepsy monitoring. A brief overview of the system is given and supported with detailed explanations of functional blocks. An in-vitro experimental setup has been designed and used for performance characterization while mimicking tissue absorption. 35% power transfer efficiency has been achieved to transfer 10 mW to the implant unit from 10 mm. Moreover, 50 kbit/s and 500 kbit/s downlink data communication has been realized with 19% and 33% power transfer efficiencies, respectively.","PeriodicalId":125553,"journal":{"name":"Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132998249","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Mahmoudi, T. Windbacher, V. Sverdlov, S. Selberherr
{"title":"Design and applications of magnetic tunnel junction based logic circuits","authors":"H. Mahmoudi, T. Windbacher, V. Sverdlov, S. Selberherr","doi":"10.1109/PRIME.2013.6603122","DOIUrl":"https://doi.org/10.1109/PRIME.2013.6603122","url":null,"abstract":"By offering zero standby power, non-volatile logic is a promising solution to overcome the leakage current issue which has become an important obstacle, when CMOS technology is shrunk. Magnetic tunnel junction (MTJ)-based logic has a great potential, because of unlimited endurance, CMOS compatibility, and fast switching speed. Recently, several non-volatile MTJ-based circuits have been presented which inherently realize logic-in-memory circuit concepts by using MTJ devices as both memory and the main computing elements. In this work we present a reliability simulation method for designing MTJ-based logic gates integrated with CMOS. As an application example, we study the reliability of a magnetic full adder in two different designs based on the implication and the reprogrammable MTJ logic gates.","PeriodicalId":125553,"journal":{"name":"Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123967635","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}