2022 IEEE Symposium on High-Performance Interconnects (HOTI)最新文献

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Sponsors HOTI 2022 HOTI 2022赞助商
2022 IEEE Symposium on High-Performance Interconnects (HOTI) Pub Date : 2022-08-01 DOI: 10.1109/hoti55740.2022.00015
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引用次数: 0
Improving Congestion Control through Fine-Grain Monitoring of InfiniBand Networks 通过ib网络的细粒度监控改善拥塞控制
2022 IEEE Symposium on High-Performance Interconnects (HOTI) Pub Date : 2022-08-01 DOI: 10.1109/HOTI55740.2022.00020
Alberto Cascajo, Gabriel Gomez-Lopez, J. Escudero-Sahuquillo, P. García, D. E. Singh, Francisco J. Alfaro-Cortés, F. Quiles, J. Carretero
{"title":"Improving Congestion Control through Fine-Grain Monitoring of InfiniBand Networks","authors":"Alberto Cascajo, Gabriel Gomez-Lopez, J. Escudero-Sahuquillo, P. García, D. E. Singh, Francisco J. Alfaro-Cortés, F. Quiles, J. Carretero","doi":"10.1109/HOTI55740.2022.00020","DOIUrl":"https://doi.org/10.1109/HOTI55740.2022.00020","url":null,"abstract":"Congestion situations are a serious threat to the performance of the interconnection networks of High-Performance Computing and Data-Center systems. Hence, the specifications of the main interconnect technologies, such as InfiniBand, define some mechanisms to deal with congestion and its effects. However, these standard mechanisms may not be suitable to detect or track accurately the actual status of network congestion, as congestion dynamics indeed can be very complex and varied. Moreover, achieving an optimal configuration of the parameters that drive the different functionalities of congestion-control mechanisms is often a difficult task, as some configurations may be suitable for some traffic scenarios, but not for others. In this paper, we propose combining an existing light-weight platform monitoring tool (LIMITLESS) with the InfiniBand control software (OpenSM), such that the metrics about communication volumes in the network provided by the former allow the latter having a more precise image of congestion status, then being able to react more efficiently in these situations. The main contributions of this paper are the methodology to link the monitor and OpenSM, as well as modifications in the InfiniBand standard congestion-control mechanism so that its reaction is modulated based on the enhanced knowledge about congestion provided by the monitor. These improvements are ready to be integrated into any InfiniBand-based system. According to the results from our experiments (performed in a real InfiniBand-based cluster where we run a widely used benchmark), the proposed approach reduces significantly the number of wrong detections of congestion, and so the number of times that the congestion-control mechanisms react unnecessarily, hence improving system performance up to 74%. The overhead of this monitoring tool is 0.1% in our experiments, collecting data each 200ms.","PeriodicalId":115402,"journal":{"name":"2022 IEEE Symposium on High-Performance Interconnects (HOTI)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123854884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Invited Talk 1 Introducing Cassini: the Slingshot NIC 特邀演讲1介绍卡西尼:弹弓NIC
2022 IEEE Symposium on High-Performance Interconnects (HOTI) Pub Date : 2022-08-01 DOI: 10.1109/hoti55740.2022.00011
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引用次数: 0
Highly Integrated 4 Tbps Silicon Photonic IC for Compute Fabric Connectivity 用于计算结构连接的高集成4tbps硅光子IC
2022 IEEE Symposium on High-Performance Interconnects (HOTI) Pub Date : 2022-08-01 DOI: 10.1109/HOTI55740.2022.00016
S. Fathololoumi, C. Malouin, D. Hui, K. Al-Hemyari, K. Nguyen, P. Seddighian, Yen-Jung Chen, Ye Wang, Aidong Yan, R. Defrees, T. Liljeberg, L. Liao
{"title":"Highly Integrated 4 Tbps Silicon Photonic IC for Compute Fabric Connectivity","authors":"S. Fathololoumi, C. Malouin, D. Hui, K. Al-Hemyari, K. Nguyen, P. Seddighian, Yen-Jung Chen, Ye Wang, Aidong Yan, R. Defrees, T. Liljeberg, L. Liao","doi":"10.1109/HOTI55740.2022.00016","DOIUrl":"https://doi.org/10.1109/HOTI55740.2022.00016","url":null,"abstract":"In this work we present the design and performance of a high bandwidth, low power, low latency, and high-density Silicon Photonic integrated circuit (SiPIC) for compute interconnects. The SiPIC has more than 4 Tbps bandwidth over eight standard single mode fiber pairs. Each fiber pair carries eight DWDM transmit and receive channels operating at 32 Gbps NRZ. We integrate all photonic components and functions including lasers, semiconductor optical amplifiers (SOAs), modulators, photodetectors, spot size convertors and V-grooves onto a single silicon die. Device design and performance details are discussed.","PeriodicalId":115402,"journal":{"name":"2022 IEEE Symposium on High-Performance Interconnects (HOTI)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128498928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Updatable Packet Classification on FPGA with Bounded Worst-Case Performance 具有有界最坏情况性能的FPGA可更新分组分类
2022 IEEE Symposium on High-Performance Interconnects (HOTI) Pub Date : 2022-08-01 DOI: 10.1109/HOTI55740.2022.00019
Yao Xin, Wen J. Li, Gaogang Xie, Yang Xu, Yi Wang
{"title":"Updatable Packet Classification on FPGA with Bounded Worst-Case Performance","authors":"Yao Xin, Wen J. Li, Gaogang Xie, Yang Xu, Yi Wang","doi":"10.1109/HOTI55740.2022.00019","DOIUrl":"https://doi.org/10.1109/HOTI55740.2022.00019","url":null,"abstract":"FPGA has been recognized as an attractive acceler-ator for line-speed packet classification in SmartNIC due to its ability to reconfigure and provide massive parallelism. As a promising algorithmic approach that can fully exploit the FPGA characteristics, decision tree based packet classification on FPGA has been actively investigated in the past decade. However, most of them suffer from unbalanced tree structures with unpredictable depths under certain rule sets, so the potential of FPGA may not be brought into full play. Worse still, few of them can support efficient rule updates on-the-fly, which is highly required in virtualized data centers. To address these issues, we design and implement an efficient hardware ar-chitecture based on the recently proposed KickTree algorithm, which consists of multiple balanced trees with bounded depth. A strategy of multi-PE (processing element), parallel search, and serial update is adopted to decouple the search and update process. The parsing of multiple tree search results adopts a modular and hierarchical design, supporting architecture with various tree numbers. Additionally, incremental rule updates can be achieved simply by traversing all PEs in one pass, with little and bounded impact on rule searching. Experimental results on FPGA show that our design can achieve an average classification throughput of 182.6 MPPS and an average update throughput of 3.1 MUPS for various 100k-scale rule sets.","PeriodicalId":115402,"journal":{"name":"2022 IEEE Symposium on High-Performance Interconnects (HOTI)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116653227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Compute Express Link®: An open industry-standard interconnect enabling heterogeneous data-centric computing Compute Express Link®:一个开放的行业标准互连,支持异构数据中心计算
2022 IEEE Symposium on High-Performance Interconnects (HOTI) Pub Date : 2022-08-01 DOI: 10.1109/HOTI55740.2022.00017
Debendra Das Sharma
{"title":"Compute Express Link®: An open industry-standard interconnect enabling heterogeneous data-centric computing","authors":"Debendra Das Sharma","doi":"10.1109/HOTI55740.2022.00017","DOIUrl":"https://doi.org/10.1109/HOTI55740.2022.00017","url":null,"abstract":"Compute Express Link is an open industry standard interconnect offering caching and memory semantics on top of PCI Express®. In addition to providing high-bandwidth and low-latency connectivity between host processor and accelerators, smart network interface card, and memory expansion devices, it also enables resource pooling across multiple systems for scalable, power-efficient and cost-effective computing. This paper delves into the micro-architectural design to deliver power-efficient performance based on our experience designing a Xeon CPU and FPGA with this technology with demonstrated silicon interoperability.","PeriodicalId":115402,"journal":{"name":"2022 IEEE Symposium on High-Performance Interconnects (HOTI)","volume":"142 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121558072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
2022 IEEE Symposium on High-Performance Interconnects HOTI 2022 2022 IEEE高性能互连研讨会HOTI 2022
2022 IEEE Symposium on High-Performance Interconnects (HOTI) Pub Date : 2022-08-01 DOI: 10.1109/hoti55740.2022.00002
{"title":"2022 IEEE Symposium on High-Performance Interconnects HOTI 2022","authors":"","doi":"10.1109/hoti55740.2022.00002","DOIUrl":"https://doi.org/10.1109/hoti55740.2022.00002","url":null,"abstract":"","PeriodicalId":115402,"journal":{"name":"2022 IEEE Symposium on High-Performance Interconnects (HOTI)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134524948","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Panel Disaggregation and reaggregation in optical interconnects: Where does each make sense? 光互连中的面板分解和重新聚合:各自在哪里有意义?
2022 IEEE Symposium on High-Performance Interconnects (HOTI) Pub Date : 2022-08-01 DOI: 10.1109/hoti55740.2022.00012
{"title":"Panel Disaggregation and reaggregation in optical interconnects: Where does each make sense?","authors":"","doi":"10.1109/hoti55740.2022.00012","DOIUrl":"https://doi.org/10.1109/hoti55740.2022.00012","url":null,"abstract":"","PeriodicalId":115402,"journal":{"name":"2022 IEEE Symposium on High-Performance Interconnects (HOTI)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127612713","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Keynote 1 The Evolution of Interconnects in The Brave New Quantum World 主题演讲1:勇敢的新量子世界中的互联进化
2022 IEEE Symposium on High-Performance Interconnects (HOTI) Pub Date : 2022-08-01 DOI: 10.1109/hoti55740.2022.00010
{"title":"Keynote 1 The Evolution of Interconnects in The Brave New Quantum World","authors":"","doi":"10.1109/hoti55740.2022.00010","DOIUrl":"https://doi.org/10.1109/hoti55740.2022.00010","url":null,"abstract":"","PeriodicalId":115402,"journal":{"name":"2022 IEEE Symposium on High-Performance Interconnects (HOTI)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131334095","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Message from the General Chairs HOTI 2022 HOTI 2022大会主席致辞
2022 IEEE Symposium on High-Performance Interconnects (HOTI) Pub Date : 2022-08-01 DOI: 10.1109/hoti55740.2022.00005
{"title":"Message from the General Chairs HOTI 2022","authors":"","doi":"10.1109/hoti55740.2022.00005","DOIUrl":"https://doi.org/10.1109/hoti55740.2022.00005","url":null,"abstract":"","PeriodicalId":115402,"journal":{"name":"2022 IEEE Symposium on High-Performance Interconnects (HOTI)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128114046","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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