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Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems最新文献

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How fast will the flip flop? 人字拖的速度有多快?
Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems Pub Date : 1994-09-01 DOI: 10.1109/ASYNC.1994.656288
M. Greenstreet, P. Cahoon
{"title":"How fast will the flip flop?","authors":"M. Greenstreet, P. Cahoon","doi":"10.1109/ASYNC.1994.656288","DOIUrl":"https://doi.org/10.1109/ASYNC.1994.656288","url":null,"abstract":"This paper describes an experimental investigation of the application of dynamical systems theory to the verification of digital VLSI circuits. We analyze the behavior of a nine-transistor toggle element using a simple, SPICE-like model. We show how such properties as minimum and maximum clock frequency can be identified from topological features of solutions to the corresponding system of differential equations. This dynamical systems perspective also gives a clear, continuous-model interpretations of such phenomena as dynamic storage and timing hazards.","PeriodicalId":114048,"journal":{"name":"Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123909383","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Testing micropipelines 测试micropipelines
Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems Pub Date : 1900-01-01 DOI: 10.1109/ASYNC.1994.656316
A. Khoche, E. Brunvand
{"title":"Testing micropipelines","authors":"A. Khoche, E. Brunvand","doi":"10.1109/ASYNC.1994.656316","DOIUrl":"https://doi.org/10.1109/ASYNC.1994.656316","url":null,"abstract":"Micropipelines, self-timed event-driven pipelines, are an attractive way of structuring asynchronous systems that exhibit many of the advantages of general asynchronous systems, but enough structure to make the design of significant systems practical. As with any design method, testing is critical. We present a technique for testing self-timed micropipelines for stuck-at faults and for delay faults in the bundled data paths by modifying the latch and control elements to include a built-in scan path for testing. This scan path allows the processing logic in the micropipeline, as well as the control of the micropipeline, to be fully tested with only a small overhead an the latch and control circuits. The test method is very similar to scan testing in synchronous systems, but the micropipeline retains its self-timed behavior during normal operation.","PeriodicalId":114048,"journal":{"name":"Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130168107","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 37
Low-energy asynchronous memory design 低能耗异步存储器设计
Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems Pub Date : 1900-01-01 DOI: 10.1109/ASYNC.1994.656310
J. Tierno, Alain J. Martin
{"title":"Low-energy asynchronous memory design","authors":"J. Tierno, Alain J. Martin","doi":"10.1109/ASYNC.1994.656310","DOIUrl":"https://doi.org/10.1109/ASYNC.1994.656310","url":null,"abstract":"We introduce the concept of energy per operation as a measure of performance of an asynchronous circuit. We show how to model energy consumption based on the high-level language specification. This model is independent of voltage and timing considerations. We apply this model to memory design. We show first how to dimension a memory array, and how to break up this memory array into smaller arrays to minimize the energy per access. We then show how to use cache memory and pre-fetch mechanisms to further reduce energy per access.","PeriodicalId":114048,"journal":{"name":"Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122617095","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Retargeting a hardware compiler proof using protocol converters 使用协议转换器重新定位硬件编译器证明
Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems Pub Date : 1900-01-01 DOI: 10.1109/ASYNC.1994.656286
Geoffrey M. Brown, W. Luk, J. O'Leary
{"title":"Retargeting a hardware compiler proof using protocol converters","authors":"Geoffrey M. Brown, W. Luk, J. O'Leary","doi":"10.1109/ASYNC.1994.656286","DOIUrl":"https://doi.org/10.1109/ASYNC.1994.656286","url":null,"abstract":"We show how to retarget the correctness proof of a hardware compiler generating two-phase delay-insensitive circuits to a compiler generating four-phase speed-independent circuits. We use protocol converters to convert the specifications of our compiler's two-phase circuit elements into equivalent specifications for four-phase elements. The processes of converting the specifications and verifying their implementations are automated.","PeriodicalId":114048,"journal":{"name":"Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129100130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Pipeline synchronization 管道同步
Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems Pub Date : 1900-01-01 DOI: 10.1109/ASYNC.1994.656289
J. Seizovic
{"title":"Pipeline synchronization","authors":"J. Seizovic","doi":"10.1109/ASYNC.1994.656289","DOIUrl":"https://doi.org/10.1109/ASYNC.1994.656289","url":null,"abstract":"Pipeline synchronization is a simple, low-cost, high-bandwidth, high-reliability solution to interfaces between synchronous and asynchronous systems, or between synchronous systems operating from different clocks. The technique can sustain maximum communication bandwidth while achieving an arbitrarily low, non-zero probability of synchronization failure, P/sub f/, with the price in both latency and chip area being /spl Oscr/(log 1/P/sub f/). Pipeline synchronization has been successfully applied to high-performance inter-computer communication in multicomputers and local-area networks.","PeriodicalId":114048,"journal":{"name":"Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116511518","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 82
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