{"title":"Sudden drop in the battery level?: understanding smartphone state of charge anomaly","authors":"M. A. Hoque, S. Tarkoma","doi":"10.1145/2818613.2818741","DOIUrl":"https://doi.org/10.1145/2818613.2818741","url":null,"abstract":"Battery State of Charge (SOC) estimation is a fundamental component of today's smartphones that affects the internal processes and observable behavior of the devices. This article systematically investigates and analyzes the SOC estimation techniques in smartphones. First, we discover that the voltage curve of a given smartphone implicitly captures the usable capacity of the battery while charging the mobile device. Second, we observe that today's SOC estimation techniques do not model battery capacity loss sufficiently to accurately capture the usable capacity. Finally, we report findings based on battery analytics of 2077 devices that validate the relationship between battery voltage and the usable capacity of a device. The presented results enable the development of more accurate battery gauges and metering solutions thus resulting in better power-saving decisions, recommendations for the users, and most importantly more reliable systems.","PeriodicalId":112226,"journal":{"name":"Power-Aware Computer Systems","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124957692","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"How device properties influence energy-delay metrics and the energy-efficiency of parallel computations","authors":"Phillip Stanley-Marbell","doi":"10.1145/2818613.2818744","DOIUrl":"https://doi.org/10.1145/2818613.2818744","url":null,"abstract":"Semiconductor device engineers are hard-pressed to relate observed device-level properties of potential CMOS replacements to computation performance. We address this challenge by developing a model linking device properties to algorithm parallelism, total computational work, and degree of voltage and frequency scaling. We then use the model to provide insight into how device properties influence execution time, average power dissipation, and overall energy usage of parallel algorithms executing in the presence of hardware concurrency. The model facilitates studying tradeoffs: It lets researchers formulate joint energy-delay metrics that account for device properties.\u0000 We support our analysis with data from a dozen large digital circuit designs, and we validate the models we present using performance and power measurements of a parallel algorithm executing on a state-of-the-art low-power multicore processor.","PeriodicalId":112226,"journal":{"name":"Power-Aware Computer Systems","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115407497","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Optimizing power consumption of mobile games","authors":"Yu Yan, Songtao He, Yunxin Liu, Longbo Huang","doi":"10.1145/2818613.2818746","DOIUrl":"https://doi.org/10.1145/2818613.2818746","url":null,"abstract":"In this paper we aim to optimize power consumption of mobile games without compromising user experience. We study the behavior of 40 mobile games on a smartphone and identify two power-inefficient issues: 1) fixed high frame rate that consumes a high power but brings negligible extra benefits to user experience when the screen content does not change rapidly or stays nearly static, and 2) high overdraw rate---the same pixels are drawn for multiple times and thus wastes energy. We report the measurement results of our study and explore possible solutions to mitigate these two issues. In particular, for the first issue, we have implemented a prototype to enable dynamic frame rate scaling that is able to reduce the frame rate to save power based on how fast the game content changes. A lower frame rate is used when the game content does not change fast and thus user-perceived experience is retained. Preliminary experimental results show that our approach is promising.","PeriodicalId":112226,"journal":{"name":"Power-Aware Computer Systems","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117027647","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
See-hwan Yoo, YoonSeok Shim, Seung-Ho Lee, Sang-Ah Lee, Joongheon Kim
{"title":"A case for bad big.LITTLE switching: how to scale power-performance in SI-HMP","authors":"See-hwan Yoo, YoonSeok Shim, Seung-Ho Lee, Sang-Ah Lee, Joongheon Kim","doi":"10.1145/2818613.2818745","DOIUrl":"https://doi.org/10.1145/2818613.2818745","url":null,"abstract":"Recently, single-ISA heterogemeous multi-core processors (SI-HMP) draw attention, pursuing optimal power-performance scaling. Leveraging differently optimized heterogeneous cores, SI-HMP can dynamically tune performance with minimal additional power consumption, or it can find maximum performance core combination with respect to a given power budget. However, the little-to-big, or big-to-little core switching has hidden costs. To properly scale up/down the power-performance, we should carefully analyze the actual performance gain, considering the multi-core processing model and inter-cluster communication. This paper reveals that there are some good and bad cases for core switching, and presents a possible way to achieve good power-performance scaling through big-little switching.","PeriodicalId":112226,"journal":{"name":"Power-Aware Computer Systems","volume":"122 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121248837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Data layout for power efficient archival storage systems","authors":"R. Reddy, A. Kathpal, J. Basak, R. Katz","doi":"10.1145/2818613.2818742","DOIUrl":"https://doi.org/10.1145/2818613.2818742","url":null,"abstract":"Legacy archival workloads have a typical write-once-read-never pattern, which fits well for tape based archival systems. With the emergence of newer applications like Facebook, Yahoo! Flickr, Apple iTunes, demand for a new class of archives has risen, where archived data continues to get accessed, albeit at lesser frequency and relaxed latency requirements. We call these types of archival storage systems as active archives. However, keeping archived data on always spinning storage media to fulfill occasional read requests is not practical due to significant power costs. Using spin-down disks, having better latency characteristics as compared to tapes, for active archives can save significant power. In this paper, we present a two-tier architecture for active archives comprising of online and offline disks, and provide an access-aware intelligent data layout mechanism to bring power efficiency. We validate the proposed mechanism with real-world archival traces. Our results indicate that the proposed clustering and optimized data layout algorithms save upto 78% power over random placement.","PeriodicalId":112226,"journal":{"name":"Power-Aware Computer Systems","volume":"47 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132359504","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modeling communication costs in blade servers","authors":"Qiuyun Wang, Benjamin C. Lee","doi":"10.1145/2818613.2818743","DOIUrl":"https://doi.org/10.1145/2818613.2818743","url":null,"abstract":"Datacenters demand big memory servers for big data. For blade servers, which disaggregate memory across multiple blades, we derive technology and architectural models to estimate communication delay and energy. These models permit new case studies in refusal scheduling to mitigate NUMA and improve the energy efficiency of data movement. Preliminary results show that our model helps researchers coordinate NUMA mitigation and queueing dynamics. We find that judiciously permitting NUMA reduces queueing time, benefiting throughput, latency and energy efficiency for datacenter workloads like Spark. These findings highlight blade servers' strengths and opportunities when building distributed shared memory machines for data analytics.","PeriodicalId":112226,"journal":{"name":"Power-Aware Computer Systems","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123050112","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Gangyong Jia, Xi Li, Jian Wan, Liang Shi, Chao Wang
{"title":"Coordinate page allocation and thread group for improving main memory power efficiency","authors":"Gangyong Jia, Xi Li, Jian Wan, Liang Shi, Chao Wang","doi":"10.1145/2525526.2525851","DOIUrl":"https://doi.org/10.1145/2525526.2525851","url":null,"abstract":"Main Memory is responsible for a large and increasing fraction of the energy consumed by multi-core systems. Therefore, it is critical to address the power issue in the memory subsystem. In this paper, we present a solution to improve memory power efficiency through coordinating page allocation and thread group scheduling (CAS). Partitioning all threads into different thread groups, after using proposed page allocation, threads in the same thread group occupy the same memory rank. Adjusting default Linux CFS, implement thread group scheduling. The CAS alternates active partial memory periodically to allow others power down and prolongs the idleness parts. Our experimental results show that this approach improves energy saving by 10% and reduces performance overhead by 8% with respect to the state of the art polices.","PeriodicalId":112226,"journal":{"name":"Power-Aware Computer Systems","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128209294","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Mobile multicores: use them or waste them","authors":"A. Carroll, G. Heiser","doi":"10.1145/2525526.2525850","DOIUrl":"https://doi.org/10.1145/2525526.2525850","url":null,"abstract":"Energy management is a primary consideration in the design of modern smartphones, made more interesting by the recent proliferation of multi-core processors in this space. We investigate how core offlining and DVFS can be used together on these systems to reduce energy consumption. We show that core offlining leads to very modest savings in the best circumstances, with a heavy penalty in others, and show the cause of this to be low per-core idle power. We develop a policy in Linux that exploits this fact, and show that it improves up to 25% on existing implementations.","PeriodicalId":112226,"journal":{"name":"Power-Aware Computer Systems","volume":"85 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121255732","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Abhilash Jindal, Abhinav Pathak, Y. Charlie Hu, S. Midkiff
{"title":"On death, taxes, and sleep disorder bugs in smartphones","authors":"Abhilash Jindal, Abhinav Pathak, Y. Charlie Hu, S. Midkiff","doi":"10.1145/2525526.2525845","DOIUrl":"https://doi.org/10.1145/2525526.2525845","url":null,"abstract":"According to Benjamin Franklin, life holds but two certainties, death and taxes. As we enter the mobile era, the primary mobile device, i.e., the smartphone, faces the certainties of adopting agressive sleeping polices to conserve battery energy, requiring programmers to use explicit power control APIs to keep the SOC/CPU on, and a third certainty that unavoidably rises from these: sleep disorder bugs.\u0000 In this paper, we articulate the fate and destiny of smartphone apps, sleep disorder bugs, as a critical technical challenge in the mobile era. We then present a taxonomy of sleep disorder bugs, and a categorization of time-critical sections which are the root cause of sleep disorders, in apps, framework services and the Android kernel. Finally, we present a unified system for detecting the spectrum of sleep disorder bugs.","PeriodicalId":112226,"journal":{"name":"Power-Aware Computer Systems","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114465179","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"How much energy can we save from prefetching ads?: energy drain analysis of top 100 apps","authors":"Xiaomeng Chen, Abhilash Jindal, Y. C. Hu","doi":"10.1145/2525526.2525848","DOIUrl":"https://doi.org/10.1145/2525526.2525848","url":null,"abstract":"Recently, there has been a surge of interests on developing techniques and architectures for prefetching ads to potentially reduce the smartphone energy drain by 3G/4G radios from fetching ads. Despite the development of prefetching techniques, it remains unclear (1) how much smartphone energy do ads consume in popular apps in dominant app markets, and (2) out of which, what portion can we realistically save from prefetching?\u0000 We present a measurement study of the energy drain of top 100 free apps in Google Play, totaling more than 2.2 B downloads, to re-examine the above two motivational questions for ads energy research. We found the upper bound energy savings from prefetching ads is low: out of the top 100 apps, only 57 apps display ads, which incur on average 3.2% total energy on ads 3G tails. We further show the already-low upper bound ads energy saving is hard to achieve by ads prefetching as different apps exhibit very different ads behavior.","PeriodicalId":112226,"journal":{"name":"Power-Aware Computer Systems","volume":"5 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127265898","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}