Proceedings of IEEE VLSI Test Symposium最新文献_第7页

Weighted random robust path delay testing of synthesized multilevel circuits 合成多电平电路的加权随机鲁棒路径延迟测试

Proceedings of IEEE VLSI Test Symposium Pub Date : 1994-04-25 DOI: 10.1109/VTEST.1994.292298

Weili Wang, S. Gupta

引用次数: 59

Discrete test generation by continuous methods 用连续方法生成离散测试

Proceedings of IEEE VLSI Test Symposium Pub Date : 1994-04-25 DOI: 10.1109/VTEST.1994.292327

Igor Rivin, S. Chakradhar

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引用次数: 3

CMOS bridging fault modeling CMOS桥接故障建模

Proceedings of IEEE VLSI Test Symposium Pub Date : 1994-04-25 DOI: 10.1109/VTEST.1994.292283

M. Renovell, P. Huc, Y. Bertrand

引用次数: 47

Design for diagnosability of linear digital filters using time-space expansion 基于时空扩展的线性数字滤波器可诊断性设计

Proceedings of IEEE VLSI Test Symposium Pub Date : 1994-04-25 DOI: 10.1109/VTEST.1994.292335

A. Chatterjee, R. Roy

引用次数: 1

On broad-side delay test 宽边延迟试验

Proceedings of IEEE VLSI Test Symposium Pub Date : 1994-04-25 DOI: 10.1109/VTEST.1994.292299

J. Savir, S. Patil

引用次数: 415

Functional design verification for the PowerPC 601 microprocessor powerpc601微处理器的功能设计验证

Proceedings of IEEE VLSI Test Symposium Pub Date : 1994-04-25 DOI: 10.1109/VTEST.1994.292292

S. Glenn, G. Meil, E. Rodriguez, J. Brooks

引用次数: 3

On identifying undetectable and redundant faults in synchronous sequential circuits 同步顺序电路中不可检测和冗余故障的识别

Proceedings of IEEE VLSI Test Symposium Pub Date : 1994-04-25 DOI: 10.1109/VTEST.1994.292341

I. Pomeranz, S. Reddy

引用次数: 52

On evaluating competing bridge fault models for CMOS ICs CMOS集成电路竞争桥故障模型的评估

Proceedings of IEEE VLSI Test Symposium Pub Date : 1994-04-25 DOI: 10.1109/VTEST.1994.292275

Brian Chess, Carl D. Roth, T. Larrabee

引用次数: 21

An automated failure analysis (AFA) methodology for repeated structures 重复结构的自动失效分析(AFA)方法

Proceedings of IEEE VLSI Test Symposium Pub Date : 1900-01-01 DOI: 10.1109/VTEST.1994.292294

A. Kablanian, F. Ferguson, A. Jee

引用次数: 21