IEEE Journal of Emerging and Selected Topics in Industrial Electronics最新文献_第3页

Fault-Tolerant Topology of Dual Active Bridge Converter for On-Board Charger in Electric Vehicles 电动汽车车载充电器双有源桥式变换器的容错拓扑

IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2024-09-16 DOI: 10.1109/JESTIE.2024.3462848

Milad Babalou;Hossein Torkaman;Edris Pouresmaeil

{"title":"Fault-Tolerant Topology of Dual Active Bridge Converter for On-Board Charger in Electric Vehicles","authors":"Milad Babalou;Hossein Torkaman;Edris Pouresmaeil","doi":"10.1109/JESTIE.2024.3462848","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3462848","url":null,"abstract":"The on-board chargers (OBCs) are commonly utilized in electric vehicles (EVs) due to their cost-effectiveness and ease of installation. The performance of EVs to supply power back to the grid has sparked interest in bidirectional power flow solutions. Dual-active-bridge (DAB) dc–dc converters have gained prominence as a promising power interface between energy storage components and the power bus. However, failures in the active devices of DAB converters can result in converter disconnection. In this article, a fault-tolerant DAB (FT-DAB) converter is proposed to improve the reliability of the OBC. In order to ensure uninterrupted operation in short-circuit and open-circuit faults of the semiconductors, the topology of the single-phase DAB is modified in such a way that the single transformer is replaced with dual-transformers in addition to employing an H5 structure for each bridge. The proposed FT-DAB converter is investigated in various faulty conditions, in which, the post-fault performance and the maximum level of the output power are discussed in detail. Finally, the FT-DAB is prototyped and tested under various post-fault scenarios. Experimental test results validate the reliable and uninterrupted operation of the FT-DAB.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"106-114"},"PeriodicalIF":0.0,"publicationDate":"2024-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905922","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Conductance Emulation Control for Real Power Compensation in Series-Stacked Active Power Decoupling Circuit 串联堆叠有源功率去耦电路中实功率补偿的电导仿真控制

IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2024-09-09 DOI: 10.1109/JESTIE.2024.3456331

Nachiketa Deshmukh;Arnab Sarkar;Sandeep Anand;Soumya Ranjan Sahoo

{"title":"Conductance Emulation Control for Real Power Compensation in Series-Stacked Active Power Decoupling Circuit","authors":"Nachiketa Deshmukh;Arnab Sarkar;Sandeep Anand;Soumya Ranjan Sahoo","doi":"10.1109/JESTIE.2024.3456331","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3456331","url":null,"abstract":"The series stacked active power decoupling (SS-APD) circuit is a power dense and efficient alternative for ripple energy storage in single phase power converter. The SS-APD circuit needs to absorb a small amount of real power to meet power losses in it. For this, the literature uses additional power supply or modifies the controller for SS-APD circuit. Such modified controllers require high bandwidth current sensing or noise-prone differentiation function. To address these challenges, this article proposes a conductance emulation control for SS-APD circuit. Here, the value of emulated conductance dictates the real power absorbed by the SS-APD circuit. It eliminates the need for differentiation function, dc-link current sensing and additional power supply for absorbing real power. Further, it uses feedback of dc-link voltage and enables independent control of SS-APD circuit from the single-phase converter. The proposed technique is investigated using state-plane analysis and small signal impedance analysis to highlight the design dependencies. In addition, the practical challenges such as proper sensing of ripple in dc-link voltage are also addressed. The load transient and steady-state performance of the proposed technique are validated by experimental studies with a 2 kW laboratory prototype.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"350-361"},"PeriodicalIF":0.0,"publicationDate":"2024-09-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905869","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Unified Sampling Mechanism to Control Average and Peak Current in a Buck Converter Under Trailing-Edge Modulation 后沿调制降压变换器中平均和峰值电流控制的统一采样机制

IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2024-09-03 DOI: 10.1109/JESTIE.2024.3454219

Snehamoy Patra;Amit Kumar Singha

{"title":"A Unified Sampling Mechanism to Control Average and Peak Current in a Buck Converter Under Trailing-Edge Modulation","authors":"Snehamoy Patra;Amit Kumar Singha","doi":"10.1109/JESTIE.2024.3454219","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3454219","url":null,"abstract":"Traditional digital implementation of average current-mode control (CMC) digitizes current loop and voltage loop. Accuracy of average current tracking depends on the sampled value of the inductor current. Existing uniformly sampled digital average CMC techniques use leading-edge modulation or dual-edge modulation and they are not easily configurable to control the peak inductor current. Moreover, existing peak CMC under leading-edge modulation is prone to noise. This article proposes a simple and robust sampling mechanism that can be configured to implement digital average CMC or peak CMC under trailing-edge modulation without changing the fundamental structure of the controller. Furthermore, the proposed peak CMC is insensitive to noise and stable even with a duty greater than 0.5. Approximate discrete-time modeling approach is considered to model the proposed mechanism. Impacts of system's parasitics on the sampling mechanism are analyzed and they are found to be insignificant. The proposed average and peak current control schemes are validated with MATLAB simulations and experimental results. The proposed sampling mechanism can be easily extended for other digital current-mode controlled converters.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"403-414"},"PeriodicalIF":0.0,"publicationDate":"2024-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Transient Stability Analysis and Enhancement of Grid-Forming and Grid-Following Converters 并网型和并网跟随型变流器的瞬态稳定性分析与改进

IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2024-08-29 DOI: 10.1109/JESTIE.2024.3452001

Chenhang Xu;Zhixiang Zou;Jiajun Yang;Zheng Wang;Wu Chen;Giampaolo Buticchi

引用次数: 0

Standalone Deployment of Two-Fold Deep Neural Network in Distributed DC Microgrid—FDIA Detection and Mitigation Scheme 双重深度神经网络在分布式直流微电网中的独立部署——fdia检测与缓解方案

IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2024-08-29 DOI: 10.1109/JESTIE.2024.3451720

Koduru Sriranga Suprabhath;Machina Venkata Siva Prasad;Sreedhar Madichetty;Sukumar Mishra

{"title":"Standalone Deployment of Two-Fold Deep Neural Network in Distributed DC Microgrid—FDIA Detection and Mitigation Scheme","authors":"Koduru Sriranga Suprabhath;Machina Venkata Siva Prasad;Sreedhar Madichetty;Sukumar Mishra","doi":"10.1109/JESTIE.2024.3451720","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3451720","url":null,"abstract":"In a distributed direct current (dc) microgrid system, the networked communication architecture enhances the accessibility of data but introduces the risk of cyberattacks. Accurate and comprehensive attack detection and mitigation techniques are essential to ensure its reliable operation, effective control, and exposure to hidden dangers and security implications. This article proposes a two-fold deep neural network (TFDNN)-based control architecture for detecting and mitigating the false data injection attack (FDIA) at the sensor level for a distributed dc microgrid system. TFDNN is a combination of two neural networks. The first neutral network predicts the converter's duty, and the second neural network detects the FDIA by producing the error value. The combination of two network outputs is the desired duty after eliminating the effect of an FDIA. Neural networks are trained with a wide range of data, including attack scenarios and system disturbances, to perform effectively for various FDIA and in-adverse conditions. Later the designed dc microgrid control is deployed into the microcontroller for standalone operation. The proposed scheme is implemented in real-time hardware, and the results are explored.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"204-214"},"PeriodicalIF":0.0,"publicationDate":"2024-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Low-Cost, Real-Time Current Sensing Full-Bridge MOSFET Topology for Efficient Operation With Resistive/Inductive Loads 一种低成本、实时电流传感的全桥MOSFET拓扑，可在电阻/电感负载下高效工作

IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2024-08-26 DOI: 10.1109/JESTIE.2024.3447744

Pritesh Anil Metha;Suresh Mikkili

{"title":"A Low-Cost, Real-Time Current Sensing Full-Bridge MOSFET Topology for Efficient Operation With Resistive/Inductive Loads","authors":"Pritesh Anil Metha;Suresh Mikkili","doi":"10.1109/JESTIE.2024.3447744","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3447744","url":null,"abstract":"This article introduces an economical and real-time current measurement technique specifically designed for \u0000<sc>mosfet</small>\u0000 full bridge topology with both resistive and inductive loads. The diverse range of current sensing approaches underscores the significance of a careful selection process tailored to meet the specific needs of the application, taking into account factors such as cost, accuracy, space utilization, and efficiency. The proposed on-state current measurement scheme effectively reduces the current sensor's impact, minimizes power loss across the sensing element, and addresses cost and size considerations. In addition, the junction temperature is estimated by establishing a relationship between the \u0000<sc>mosfet</small>\u0000 drain pad temperature and coefficient “k.” The effectiveness of the proposed methodology is validated on a printed circuit board under both resistive and inductive load conditions. The measurement results demonstrate close adherence of the on-state current to the reference current. Noteworthy is the minimal error observed in the case of an inductive load, with a recorded value of 0.06 A at a duty cycle of 10% and a frequency of 25 kHz.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"382-390"},"PeriodicalIF":0.0,"publicationDate":"2024-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

High-Frequency High-Power Density Multicell Transformer-Coupled Input-Series-Output-Parallel (ISOP) Double Clamp ZVS Flyback Converter 高频高功率密度多电池变压器耦合输入-串联-输出-并联（ISOP）双箝位ZVS反激变换器

IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2024-08-22 DOI: 10.1109/JESTIE.2024.3447776

Song Ding;Zhihong Zhao;Qi Liu;Feng Hong;Chunyan Nie;Lei Li;Li Chen;Weifeng Sun;Qinsong Qian;Baojian Ji

{"title":"High-Frequency High-Power Density Multicell Transformer-Coupled Input-Series-Output-Parallel (ISOP) Double Clamp ZVS Flyback Converter","authors":"Song Ding;Zhihong Zhao;Qi Liu;Feng Hong;Chunyan Nie;Lei Li;Li Chen;Weifeng Sun;Qinsong Qian;Baojian Ji","doi":"10.1109/JESTIE.2024.3447776","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3447776","url":null,"abstract":"Double-clamp zero-voltage-switching (DCZVS) full-bridge flyback converter is one of the most attractive solutions for high-power density applications with wide input range, because of its features of primary-side regulation and excellent soft-switching. By analyzing the zero-voltage switching process and the maximum output power at maximum flux, this article reveals that the dead-time is one of the key parameters to restrict the output power of the DCZVS converter at high switching frequency. Then, the multicell transformer-coupled input-series-output-parallel (ISOP) structure is proposed in this article to shorten the dead-time so as to improve the output power of the DCZVS converter, which does not increase the size of the transformer. In the multicell converters, the number of cells and the transformer design are also discussed. Finally, a DCZVS prototype with two transformer-coupled ISOP cells is built up to validate the design, which achieves a wide input range of 160–420 V and realizes a 28 V/20 A output with a power density of 1203 W/inch\u0000<sup>3</sup>\u0000 and a peak efficiency of 93.69%. Compared with the original DCZVS converter, the proposed two-cell DCZVS converter achieves a 15% increase in power density with the same transformer size and maximum flux.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"259-270"},"PeriodicalIF":0.0,"publicationDate":"2024-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905949","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Synchronverters With Damper Windings to Attenuate Power Oscillations in Grids 带阻尼绕组的同步变频器可减弱电网中的功率振荡

IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2024-08-21 DOI: 10.1109/JESTIE.2024.3447462

Hang Yin;Zeev Kustanovich;Jyun Lin;George Weiss

{"title":"Synchronverters With Damper Windings to Attenuate Power Oscillations in Grids","authors":"Hang Yin;Zeev Kustanovich;Jyun Lin;George Weiss","doi":"10.1109/JESTIE.2024.3447462","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3447462","url":null,"abstract":"Synchronous generators (SGs) have damper windings on their rotor that help to dampen the oscillations. Virtual synchronous machines (VSMs) are inverters that emulate the behavior of SGs. Usually, these have no damper windings, instead they make use of fast frequency droop to help maintain the power balance in the grid and also for the damping of unwanted oscillations. The drawback is that the inverter is required to be able to inject or absorb extra power, depending on the grid frequency. We propose a simple model of a damper winding that can be added to the control algorithm of a VSM. A precise model of the damper windings present in an SG is complicated and necessities several additional state variables. Instead, we propose a very simple but effective approximation, where the virtual damper winding torque \u0000<inline-formula><tex-math>$T_{w}$</tex-math></inline-formula>\u0000 is derived directly from the existing state variables of the VSM and its terminal voltages. There is no need for a phase-locked loop (PLL) to estimate the grid frequency \u0000<inline-formula><tex-math>${omega }_{g}$</tex-math></inline-formula>\u0000, even though, \u0000<inline-formula><tex-math>$T_{w}$</tex-math></inline-formula>\u0000 depends on the difference between the internal frequency \u0000<inline-formula><tex-math>${omega }$</tex-math></inline-formula>\u0000 and \u0000<inline-formula><tex-math>${omega }_{g}$</tex-math></inline-formula>\u0000. The analysis is based on a simplified model of a synchronverter. The proposed algorithm has been verified both by simulations and microgrid experiments. The performance of the proposed algorithm has been compared to the performance of two other recently proposed algorithms, which use a damping torque in addition to frequency droop, and which also do not rely on a PLL for this.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"5 4","pages":"1376-1387"},"PeriodicalIF":0.0,"publicationDate":"2024-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142438638","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Efficient Islanding Detection and Power Quality Enhancement in Smart Grids: A Dual-Stage Hybrid Solution 智能电网中高效孤岛检测和电能质量提升：双级混合解决方案

IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2024-08-15 DOI: 10.1109/JESTIE.2024.3444047

Rakesh Shamrao Patekar;Bijaya Ketan Panigrahi

{"title":"Efficient Islanding Detection and Power Quality Enhancement in Smart Grids: A Dual-Stage Hybrid Solution","authors":"Rakesh Shamrao Patekar;Bijaya Ketan Panigrahi","doi":"10.1109/JESTIE.2024.3444047","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3444047","url":null,"abstract":"Inverter-based generations (IBGs) should have a properly designed anti-islanding protection system. Most IBGs use an active islanding detection strategy because of the minimal nondetection zone and quick operation. However, the power quality of the distribution network may suffer due to the increasing penetration of the active disturbance signals. This article compares the active islanding detection methods based on disturbance injection and Sandia frequency shift phase angle transformation to analyze the impact on the power quality of the electrical distribution network. An innovative two-stage hybrid anti-islanding protection strategy based on Sandia frequency shift phase angle modification and rate of rise of kinetic energy is also proposed in this article. The approach only activates the phase angle variations for the case of suspected islanding to minimize power quality issues. The suggested approach is quick, precise, reliable, affordable, and straightforward. The technique has undergone extensive testing for more than 200 distinct islanding and nonislanding events, and it appears to be entirely accurate. Experimental verification of the proposed method has been conducted on an real-time digital simulator-Typhoon hardware-in-loop-based power hardware-in-loop set up to demonstrate its real-time application.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"165-174"},"PeriodicalIF":0.0,"publicationDate":"2024-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905772","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Multiple Active Bridge Converter Controlled by a Feed-Forward Compensator 前馈补偿器控制的多有源桥式变换器

IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2024-08-14 DOI: 10.1109/JESTIE.2024.3425274

Roberto C. Barragán;Nimrod Vazquez;Marco Liserre;Claudia Hernández;Hector Lopez;Gilberto Gonzalez

引用次数: 0