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International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications最新文献

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System-Level Modeling of Dynamically Reconfigurable Co-processors 动态可重构协处理器的系统级建模
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_93
Yang Qu, Kari Tiensyrjä, K. Masselos
{"title":"System-Level Modeling of Dynamically Reconfigurable Co-processors","authors":"Yang Qu, Kari Tiensyrjä, K. Masselos","doi":"10.1007/978-3-540-30117-2_93","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_93","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"158 1","pages":"881-885"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75146516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
A Modular System for FPGA-Based TCP Flow Processing in High-Speed Networks 高速网络中基于fpga的TCP流处理模块化系统
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_32
David V. Schuehler, J. Lockwood
{"title":"A Modular System for FPGA-Based TCP Flow Processing in High-Speed Networks","authors":"David V. Schuehler, J. Lockwood","doi":"10.1007/978-3-540-30117-2_32","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_32","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"99 1","pages":"301-310"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72968200","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 66
Storage Allocation for Diverse FPGA Memory Specifications 不同FPGA内存规格的存储分配
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_62
Dalia Dagher, Iyad Ouaiss
{"title":"Storage Allocation for Diverse FPGA Memory Specifications","authors":"Dalia Dagher, Iyad Ouaiss","doi":"10.1007/978-3-540-30117-2_62","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_62","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"58 1","pages":"606-616"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74249144","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Using of FPGA Coprocessor for Improving the Execution Speed of the Pattern Recognition Algorithm for ATLAS - High Energy Physics Experiment 利用FPGA协处理器提高ATLAS -高能物理实验模式识别算法的执行速度
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_80
C. Hinkelbein, A. Khomich, A. Kugel, R. Männer, Matthias Müller
{"title":"Using of FPGA Coprocessor for Improving the Execution Speed of the Pattern Recognition Algorithm for ATLAS - High Energy Physics Experiment","authors":"C. Hinkelbein, A. Khomich, A. Kugel, R. Männer, Matthias Müller","doi":"10.1007/978-3-540-30117-2_80","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_80","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"16 2","pages":"791-800"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72462396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimizing the Performance of the Simulated Annealing Based Placement Algorithms for Island-Style FPGAs 海岛型fpga模拟退火布局算法的性能优化
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_88
A. Danilin, S. Sawitzki
{"title":"Optimizing the Performance of the Simulated Annealing Based Placement Algorithms for Island-Style FPGAs","authors":"A. Danilin, S. Sawitzki","doi":"10.1007/978-3-540-30117-2_88","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_88","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"115 1","pages":"852-856"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79084117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor 用上下文切换虚拟子句管道和FPGA嵌入式处理器解决SAT问题
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_36
Carlos J. Tavares, C. Bungardean, G. Matos, J. Sousa
{"title":"Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor","authors":"Carlos J. Tavares, C. Bungardean, G. Matos, J. Sousa","doi":"10.1007/978-3-540-30117-2_36","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_36","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"23 1","pages":"344-353"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84623031","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Stochastic Simulation for Biochemical Reactions on FPGA 基于FPGA的生化反应随机模拟
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_13
Masato Yoshimi, Yasunori Osana, T. Fukushima, H. Amano
{"title":"Stochastic Simulation for Biochemical Reactions on FPGA","authors":"Masato Yoshimi, Yasunori Osana, T. Fukushima, H. Amano","doi":"10.1007/978-3-540-30117-2_13","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_13","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"34 1","pages":"105-114"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85092784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 35
A Structured Methodology for System-on-an-FPGA Design fpga上系统设计的结构化方法
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_124
N. P. Sedcole, P. Cheung, G. Constantinides, W. Luk
{"title":"A Structured Methodology for System-on-an-FPGA Design","authors":"N. P. Sedcole, P. Cheung, G. Constantinides, W. Luk","doi":"10.1007/978-3-540-30117-2_124","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_124","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"26 1","pages":"1047-1051"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85230955","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Virtualizing the Dimensions of a Coarse-Grained Reconfigurable Array 虚拟化粗粒度可重构数组的维度
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_146
T. Ristimäki, J. Nurmi
{"title":"Virtualizing the Dimensions of a Coarse-Grained Reconfigurable Array","authors":"T. Ristimäki, J. Nurmi","doi":"10.1007/978-3-540-30117-2_146","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_146","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"16 1","pages":"1130-1132"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81985266","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Mapping Basic Recursive Structures to Runtime Reconfigurable Hardware 将基本递归结构映射到运行时可重构硬件
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_97
H. ElGindy, George Ferizis
{"title":"Mapping Basic Recursive Structures to Runtime Reconfigurable Hardware","authors":"H. ElGindy, George Ferizis","doi":"10.1007/978-3-540-30117-2_97","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_97","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"9 1","pages":"906-910"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81348967","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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