发布求助
文献互助 智能选刊 最新文献

International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications最新文献

筛选
英文 中文
FPGA Implementation of the Ridge Line Following Fingerprint Algorithm 脊线跟踪指纹算法的FPGA实现
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_133
E. Cantó, N. Canyellas, M. Fons, F. Fons, Mariano López
{"title":"FPGA Implementation of the Ridge Line Following Fingerprint Algorithm","authors":"E. Cantó, N. Canyellas, M. Fons, F. Fons, Mariano López","doi":"10.1007/978-3-540-30117-2_133","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_133","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"105 1","pages":"1087-1089"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80943491","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Automatic Creation of Reconfigurable PALs/PLAs for SoC 自动创建可重构的SoC PALs/ pla
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_55
M. Holland, S. Hauck
{"title":"Automatic Creation of Reconfigurable PALs/PLAs for SoC","authors":"M. Holland, S. Hauck","doi":"10.1007/978-3-540-30117-2_55","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_55","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"28 1","pages":"536-545"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79518426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Reconfigurable Systems Emerge 可重构系统出现
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_2
N. Tredennick, B. Shimamoto
{"title":"Reconfigurable Systems Emerge","authors":"N. Tredennick, B. Shimamoto","doi":"10.1007/978-3-540-30117-2_2","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_2","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"41 1","pages":"2-11"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78303492","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Increasing Pipelined IP Core Utilization in Process Networks Using Exploration 利用探索增加流程网络中流水线IP核的利用率
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_70
Claudiu Zissulescu, B. Kienhuis, E. Deprettere
{"title":"Increasing Pipelined IP Core Utilization in Process Networks Using Exploration","authors":"Claudiu Zissulescu, B. Kienhuis, E. Deprettere","doi":"10.1007/978-3-540-30117-2_70","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_70","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"19 1","pages":"690-699"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82227689","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
On-Demand FPGA Run-Time System for Dynamical Reconfiguration with Adaptive Priorities 基于自适应优先级动态重构的按需FPGA运行系统
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_47
M. Ullmann, M. Hübner, Björn Grimm, J. Becker
{"title":"On-Demand FPGA Run-Time System for Dynamical Reconfiguration with Adaptive Priorities","authors":"M. Ullmann, M. Hübner, Björn Grimm, J. Becker","doi":"10.1007/978-3-540-30117-2_47","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_47","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"26 1","pages":"454-463"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82412500","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 49
Dynamic Adaptive Runtime Routing Techniques in Multigrain Reconfigurable Hardware Architectures 多粒可重构硬件体系结构中的动态自适应运行时路由技术
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_14
Alexander Thomas, J. Becker
{"title":"Dynamic Adaptive Runtime Routing Techniques in Multigrain Reconfigurable Hardware Architectures","authors":"Alexander Thomas, J. Becker","doi":"10.1007/978-3-540-30117-2_14","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_14","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"111 1","pages":"115-124"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79624991","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
A Low Fragmentation Heuristic for Task Placement in 2D RTR HW Management 二维RTR硬件管理中任务布置的低碎片启发式算法
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_26
J. Tabero, J. Septién, H. Mecha, D. Mozos
{"title":"A Low Fragmentation Heuristic for Task Placement in 2D RTR HW Management","authors":"J. Tabero, J. Septién, H. Mecha, D. Mozos","doi":"10.1007/978-3-540-30117-2_26","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_26","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"18 1","pages":"241-250"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87320528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 58
FPGAs BIST Evaluation 标题
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_35
A. Parreira, João Paulo Teixeira, Marcelino B. Santos
{"title":"FPGAs BIST Evaluation","authors":"A. Parreira, João Paulo Teixeira, Marcelino B. Santos","doi":"10.1007/978-3-540-30117-2_35","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_35","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"25 1","pages":"333-343"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73564715","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Optimized Field Programmable Gate Array Based Function Evaluation 基于功能评估的优化现场可编程门阵列
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_171
Nalin Sidahao
{"title":"Optimized Field Programmable Gate Array Based Function Evaluation","authors":"Nalin Sidahao","doi":"10.1007/978-3-540-30117-2_171","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_171","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"661 1","pages":"1184"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76844964","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The Implementation of a FPGA Hardware Debugger System with Minimal System Overhead 最小系统开销的FPGA硬件调试器系统的实现
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_127
J. Tombs, Miguel Angel Aguirre Echánove, F. Muñoz, V. Baena, A. Torralba, A. Fernandez-León, Francisco Tortosa
{"title":"The Implementation of a FPGA Hardware Debugger System with Minimal System Overhead","authors":"J. Tombs, Miguel Angel Aguirre Echánove, F. Muñoz, V. Baena, A. Torralba, A. Fernandez-León, Francisco Tortosa","doi":"10.1007/978-3-540-30117-2_127","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_127","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"56 1","pages":"1062-1066"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78131277","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信