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International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications最新文献

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TPR: Three-D Place and Route for FPGAs TPR: fpga的三维布局和布线
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_162
Cristinel Ababei
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引用次数: 4
Design and Implementation of the Memory Scheduler for the PC-Based Router 基于pc的路由器内存调度程序的设计与实现
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_147
Tomás Marek, M. Novotný, Ludek Crha
{"title":"Design and Implementation of the Memory Scheduler for the PC-Based Router","authors":"Tomás Marek, M. Novotný, Ludek Crha","doi":"10.1007/978-3-540-30117-2_147","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_147","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"1 1","pages":"1133-1135"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77833745","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Automated Speculation and Parallelism in High Performance Network Applications 高性能网络应用中的自动推测和并行性
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_165
G. Schelle, D. Grunwald
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引用次数: 0
A Dynamically Reconfigurable Asynchronous FPGA Architecture 动态可重构异步FPGA架构
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_85
Xin Jia, Jayanthi Rajagopalan, R. Vemuri
{"title":"A Dynamically Reconfigurable Asynchronous FPGA Architecture","authors":"Xin Jia, Jayanthi Rajagopalan, R. Vemuri","doi":"10.1007/978-3-540-30117-2_85","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_85","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"1 1","pages":"836-841"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76148920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
FiPRe: An Implementation Model to Enable Self-Reconfigurable Applications FiPRe:一个支持自重构应用程序的实现模型
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_123
Leandro Möller, Ney Laert Vilar Calazans, F. Moraes, E. Brião, Ewerson Carvalho, Daniel Camozzato
{"title":"FiPRe: An Implementation Model to Enable Self-Reconfigurable Applications","authors":"Leandro Möller, Ney Laert Vilar Calazans, F. Moraes, E. Brião, Ewerson Carvalho, Daniel Camozzato","doi":"10.1007/978-3-540-30117-2_123","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_123","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"1 1","pages":"1042-1046"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76167059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
FPGA-Based Computation for Maximum Likelihood Phylogenetic Tree Evaluation 基于fpga的最大似然系统发育树评估计算
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_130
T. Mak, K. Lam
{"title":"FPGA-Based Computation for Maximum Likelihood Phylogenetic Tree Evaluation","authors":"T. Mak, K. Lam","doi":"10.1007/978-3-540-30117-2_130","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_130","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"39 2","pages":"1076-1079"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72486566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
The Chess Monster Hydra 象棋怪物九头蛇
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_101
Chrilly Donninger, Ulf Lorenz
{"title":"The Chess Monster Hydra","authors":"Chrilly Donninger, Ulf Lorenz","doi":"10.1007/978-3-540-30117-2_101","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_101","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"22 1","pages":"927-932"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81128819","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
An Efficient Battery-Aware Task Scheduling Methodology for Portable RC Platforms 便携式遥控平台的高效电池感知任务调度方法
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_68
J. Khan, R. Vemuri
{"title":"An Efficient Battery-Aware Task Scheduling Methodology for Portable RC Platforms","authors":"J. Khan, R. Vemuri","doi":"10.1007/978-3-540-30117-2_68","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_68","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"8 1","pages":"669-678"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86851629","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Evolvable Hardware for Signal Separation and Noise Cancellation Using Analog Reconfigurable Device 利用模拟可重构器件实现信号分离和噪声消除的可进化硬件
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_29
D. Keymeulen, R. Zebulum, A. Stoica, V. Duong, M. I. Ferguson
{"title":"Evolvable Hardware for Signal Separation and Noise Cancellation Using Analog Reconfigurable Device","authors":"D. Keymeulen, R. Zebulum, A. Stoica, V. Duong, M. I. Ferguson","doi":"10.1007/978-3-540-30117-2_29","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_29","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"42 1","pages":"270-278"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84232138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Code Re-ordering for a Class of Reconfigurable Microprocessors 一类可重构微处理器的代码重排序
International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications Pub Date : 2004-08-30 DOI: 10.1007/978-3-540-30117-2_160
B. F. Veale, J. Antonio, M. Tull
{"title":"Code Re-ordering for a Class of Reconfigurable Microprocessors","authors":"B. F. Veale, J. Antonio, M. Tull","doi":"10.1007/978-3-540-30117-2_160","DOIUrl":"https://doi.org/10.1007/978-3-540-30117-2_160","url":null,"abstract":"","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"57 1","pages":"1170"},"PeriodicalIF":0.0,"publicationDate":"2004-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85261234","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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