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Proceedings. International Symposium on Computer Architecture最新文献

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Parallel and high-performance systems 并行和高性能系统
Proceedings. International Symposium on Computer Architecture Pub Date : 2016-11-25 DOI: 10.4324/9781315367118-6
J. Dumas
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引用次数: 1
Exceptions, interrupts, and input/output systems 异常、中断和输入/输出系统
Proceedings. International Symposium on Computer Architecture Pub Date : 2016-11-25 DOI: 10.4324/9781315367118-5
J. Dumas
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引用次数: 0
Research on Formal Modeling and Verification of on-board ATP System 车载ATP系统形式化建模与验证研究
Proceedings. International Symposium on Computer Architecture Pub Date : 2013-10-06 DOI: 10.2991/ISCA-13.2013.5
Caiyun Chen, Qing Luo, Fang Zhang, Daqing Wang, X. Xue
{"title":"Research on Formal Modeling and Verification of on-board ATP System","authors":"Caiyun Chen, Qing Luo, Fang Zhang, Daqing Wang, X. Xue","doi":"10.2991/ISCA-13.2013.5","DOIUrl":"https://doi.org/10.2991/ISCA-13.2013.5","url":null,"abstract":"Formal software safety verification is an important issue for on-board ATP (Automation Train Protection) system. A SCADE-based model safety formal verification method is designed in this paper. The extracted safety properties of ATP are expressed by formal automaton machine, which is an unambiguous semantics of the formal method ensuring model-based formal verification mechanisms for system safety. Furthermore, the on-board ATP system and the safety properties module are modeled in SCADE suite, and the safety verification by combination of the two models is done in the Design Verifier using SAT-based Bounded model-checking. The advantages of this method are of completeness and can reduce verification costs.","PeriodicalId":91388,"journal":{"name":"Proceedings. International Symposium on Computer Architecture","volume":"12 1","pages":"27-32"},"PeriodicalIF":0.0,"publicationDate":"2013-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91397523","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Using partial tag comparison in low-power snoop-based chip multiprocessors 在低功耗窥探型芯片多处理器中使用部分标签比较
Proceedings. International Symposium on Computer Architecture Pub Date : 2010-06-19 DOI: 10.1007/978-3-642-24322-6_18
Ali Shafiee, Narges Shahidi, A. Baniasadi
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引用次数: 5
Improving server performance on multi-cores via selective off-loading of OS functionality 通过选择性卸载操作系统功能来提高多核服务器的性能
Proceedings. International Symposium on Computer Architecture Pub Date : 2010-06-19 DOI: 10.1007/978-3-642-24322-6_23
D. Nellans, K. Sudan, E. Brunvand, R. Balasubramonian
{"title":"Improving server performance on multi-cores via selective off-loading of OS functionality","authors":"D. Nellans, K. Sudan, E. Brunvand, R. Balasubramonian","doi":"10.1007/978-3-642-24322-6_23","DOIUrl":"https://doi.org/10.1007/978-3-642-24322-6_23","url":null,"abstract":"","PeriodicalId":91388,"journal":{"name":"Proceedings. International Symposium on Computer Architecture","volume":"43 1","pages":"275-292"},"PeriodicalIF":0.0,"publicationDate":"2010-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77725896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
The search for energy-efficient building blocks for the data center 为数据中心寻找节能的构建模块
Proceedings. International Symposium on Computer Architecture Pub Date : 2010-06-19 DOI: 10.1007/978-3-642-24322-6_15
Laura Keys, Suzanne Rivoire, John D. Davis
{"title":"The search for energy-efficient building blocks for the data center","authors":"Laura Keys, Suzanne Rivoire, John D. Davis","doi":"10.1007/978-3-642-24322-6_15","DOIUrl":"https://doi.org/10.1007/978-3-642-24322-6_15","url":null,"abstract":"","PeriodicalId":91388,"journal":{"name":"Proceedings. International Symposium on Computer Architecture","volume":"11 1","pages":"172-182"},"PeriodicalIF":0.0,"publicationDate":"2010-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78542801","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 31
Computation vs. memory systems: pinning down accelerator bottlenecks 计算vs.内存系统:确定加速器瓶颈
Proceedings. International Symposium on Computer Architecture Pub Date : 2010-06-19 DOI: 10.1007/978-3-642-24322-6_9
Martha A. Kim, S. Edwards
{"title":"Computation vs. memory systems: pinning down accelerator bottlenecks","authors":"Martha A. Kim, S. Edwards","doi":"10.1007/978-3-642-24322-6_9","DOIUrl":"https://doi.org/10.1007/978-3-642-24322-6_9","url":null,"abstract":"","PeriodicalId":91388,"journal":{"name":"Proceedings. International Symposium on Computer Architecture","volume":"36 1","pages":"86-98"},"PeriodicalIF":0.0,"publicationDate":"2010-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79644234","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A case for coordinated resource management in heterogeneous multicore platforms 异构多核平台中协调资源管理的一个案例
Proceedings. International Symposium on Computer Architecture Pub Date : 2010-06-19 DOI: 10.1007/978-3-642-24322-6_27
Priyanka Tembey, Ada Gavrilovska, K. Schwan
{"title":"A case for coordinated resource management in heterogeneous multicore platforms","authors":"Priyanka Tembey, Ada Gavrilovska, K. Schwan","doi":"10.1007/978-3-642-24322-6_27","DOIUrl":"https://doi.org/10.1007/978-3-642-24322-6_27","url":null,"abstract":"","PeriodicalId":91388,"journal":{"name":"Proceedings. International Symposium on Computer Architecture","volume":"120 1","pages":"341-356"},"PeriodicalIF":0.0,"publicationDate":"2010-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79327979","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Accelerating agent-based ecosystem models using the cell broadband engine 使用小区宽带引擎加速基于智能体的生态系统模型
Proceedings. International Symposium on Computer Architecture Pub Date : 2010-06-19 DOI: 10.1007/978-3-642-24322-6_1
Michael Lange, T. Field
{"title":"Accelerating agent-based ecosystem models using the cell broadband engine","authors":"Michael Lange, T. Field","doi":"10.1007/978-3-642-24322-6_1","DOIUrl":"https://doi.org/10.1007/978-3-642-24322-6_1","url":null,"abstract":"","PeriodicalId":91388,"journal":{"name":"Proceedings. International Symposium on Computer Architecture","volume":"1 1","pages":"1-12"},"PeriodicalIF":0.0,"publicationDate":"2010-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82258247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Performance impact of task mapping on the cell BE multicore processor 任务映射对cell BE多核处理器性能的影响
Proceedings. International Symposium on Computer Architecture Pub Date : 2010-06-19 DOI: 10.1007/978-3-642-24322-6_2
J. Keller, A. Varbanescu
{"title":"Performance impact of task mapping on the cell BE multicore processor","authors":"J. Keller, A. Varbanescu","doi":"10.1007/978-3-642-24322-6_2","DOIUrl":"https://doi.org/10.1007/978-3-642-24322-6_2","url":null,"abstract":"","PeriodicalId":91388,"journal":{"name":"Proceedings. International Symposium on Computer Architecture","volume":"26 1","pages":"13-23"},"PeriodicalIF":0.0,"publicationDate":"2010-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82461175","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
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