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Journal of VLSI signal processing systems for signal, image, and video technology最新文献

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Processor Enhancements for Media Streaming Applications 媒体流应用程序的处理器增强
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-09-01 DOI: 10.1007/s11265-005-6652-5
S. Bilavarn, Eric Debes, P. Vandergheynst, J. Diguet
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引用次数: 2
Reducing 3D Fast Wavelet Transform Execution Time Using Blocking and the Streaming SIMD Extensions 使用阻塞和流SIMD扩展减少3D快速小波变换的执行时间
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-09-01 DOI: 10.1007/s11265-005-6651-6
G. Bernabé, José M. García, José González
{"title":"Reducing 3D Fast Wavelet Transform Execution Time Using Blocking and the Streaming SIMD Extensions","authors":"G. Bernabé, José M. García, José González","doi":"10.1007/s11265-005-6651-6","DOIUrl":"https://doi.org/10.1007/s11265-005-6651-6","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"38 1","pages":"209-223"},"PeriodicalIF":0.0,"publicationDate":"2005-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80156278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
A Platform-Independent Methodology for Performance Estimation of Multimedia Signal Processing Applications 一种与平台无关的多媒体信号处理应用性能评估方法
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-09-01 DOI: 10.1007/s11265-005-6646-3
H. Stolberg, Mladen Berekovic, P. Pirsch
{"title":"A Platform-Independent Methodology for Performance Estimation of Multimedia Signal Processing Applications","authors":"H. Stolberg, Mladen Berekovic, P. Pirsch","doi":"10.1007/s11265-005-6646-3","DOIUrl":"https://doi.org/10.1007/s11265-005-6646-3","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"49 1","pages":"139-151"},"PeriodicalIF":0.0,"publicationDate":"2005-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79708043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A Simulation and Exploration Technology for Multimedia-Application-Driven Architectures 多媒体应用驱动体系结构的仿真与探索技术
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-09-01 DOI: 10.1007/s11265-005-6647-2
I. Barbieri, M. Bariani, A. Cabitto, M. Raggio
{"title":"A Simulation and Exploration Technology for Multimedia-Application-Driven Architectures","authors":"I. Barbieri, M. Bariani, A. Cabitto, M. Raggio","doi":"10.1007/s11265-005-6647-2","DOIUrl":"https://doi.org/10.1007/s11265-005-6647-2","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"174 1","pages":"153-168"},"PeriodicalIF":0.0,"publicationDate":"2005-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85542005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
An Efficient Picture-Rate Up-Converter 一种高效的图像速率上转换器
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-08-01 DOI: 10.1007/s11265-005-6250-6
A. Beric, G. Haan, R. Sethuraman, J. V. Meerbergen
{"title":"An Efficient Picture-Rate Up-Converter","authors":"A. Beric, G. Haan, R. Sethuraman, J. V. Meerbergen","doi":"10.1007/s11265-005-6250-6","DOIUrl":"https://doi.org/10.1007/s11265-005-6250-6","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"44 1","pages":"49-63"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82341516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A Hardware/Software Co-Design of MP3 Audio Decoder MP3音频解码器的软硬件协同设计
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-08-01 DOI: 10.1007/s11265-005-6254-2
T. Tsai, Ya-Chau Yang, Chun-Nan Liu
{"title":"A Hardware/Software Co-Design of MP3 Audio Decoder","authors":"T. Tsai, Ya-Chau Yang, Chun-Nan Liu","doi":"10.1007/s11265-005-6254-2","DOIUrl":"https://doi.org/10.1007/s11265-005-6254-2","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"84 1","pages":"111-127"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73428766","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Power and Substrate Noise Tolerance of Configurable Embedded Memories in SoC SoC中可配置嵌入式存储器的功耗和衬底噪声容限
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-08-01 DOI: 10.1007/s11265-005-6252-4
Meng-Fan Chang, K. Wen
{"title":"Power and Substrate Noise Tolerance of Configurable Embedded Memories in SoC","authors":"Meng-Fan Chang, K. Wen","doi":"10.1007/s11265-005-6252-4","DOIUrl":"https://doi.org/10.1007/s11265-005-6252-4","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"47 1","pages":"81-91"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72831966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Efficiency Analysis for a Mixed-Signal Focal Plane Processing Architecture 一种混合信号焦平面处理体系的效率分析
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-08-01 DOI: 10.1007/s11265-005-6251-5
William H. Robinson, D. S. Wills
{"title":"Efficiency Analysis for a Mixed-Signal Focal Plane Processing Architecture","authors":"William H. Robinson, D. S. Wills","doi":"10.1007/s11265-005-6251-5","DOIUrl":"https://doi.org/10.1007/s11265-005-6251-5","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"9 1","pages":"65-80"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79531896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Accelerating Mobile Video: A 64-Bit SIMD Architecture for Handheld Applications 加速移动视频:用于手持应用的64位SIMD架构
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-08-01 DOI: 10.1007/s11265-005-6248-0
N. Paver, Moinul H. Khan, B. C. Aldrich, C. D. Emmons
{"title":"Accelerating Mobile Video: A 64-Bit SIMD Architecture for Handheld Applications","authors":"N. Paver, Moinul H. Khan, B. C. Aldrich, C. D. Emmons","doi":"10.1007/s11265-005-6248-0","DOIUrl":"https://doi.org/10.1007/s11265-005-6248-0","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"77 1","pages":"21-34"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77373233","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A Software-Hardware Co-Implementation of MPEG-4 Advanced Video Coding (AVC) Decoder with Block Level Pipelining 基于块级流水线的MPEG-4高级视频编码(AVC)解码器的软硬件协同实现
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-08-01 DOI: 10.1007/s11265-005-6253-3
Shih-Hao Wang, Wen-Hsiao Peng, Yuwen He, Guan-Yi Lin, Cheng-Yi Lin, Shih-Chien Chang, Chung-Neng Wang, Tihao Chiang
{"title":"A Software-Hardware Co-Implementation of MPEG-4 Advanced Video Coding (AVC) Decoder with Block Level Pipelining","authors":"Shih-Hao Wang, Wen-Hsiao Peng, Yuwen He, Guan-Yi Lin, Cheng-Yi Lin, Shih-Chien Chang, Chung-Neng Wang, Tihao Chiang","doi":"10.1007/s11265-005-6253-3","DOIUrl":"https://doi.org/10.1007/s11265-005-6253-3","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"23 1","pages":"93-110"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88520096","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 29
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