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Journal of VLSI signal processing systems for signal, image, and video technology最新文献

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High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation 四舍五入选择的高基数对数:算法与实现
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-05-01 DOI: 10.1007/s11265-005-4941-7
José-Alejandro Piñeiro, M. Ercegovac, J. Bruguera
{"title":"High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation","authors":"José-Alejandro Piñeiro, M. Ercegovac, J. Bruguera","doi":"10.1007/s11265-005-4941-7","DOIUrl":"https://doi.org/10.1007/s11265-005-4941-7","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"60 1","pages":"109-123"},"PeriodicalIF":0.0,"publicationDate":"2005-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73691038","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
New Complexity Results on Array Contraction and Related Problems 关于阵列收缩和相关问题的新的复杂性结果
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-05-01 DOI: 10.1007/s11265-005-4937-3
A. Darte, Guillaume Huard
{"title":"New Complexity Results on Array Contraction and Related Problems","authors":"A. Darte, Guillaume Huard","doi":"10.1007/s11265-005-4937-3","DOIUrl":"https://doi.org/10.1007/s11265-005-4937-3","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"26 1","pages":"35-55"},"PeriodicalIF":0.0,"publicationDate":"2005-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79539082","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
VLSI Photonic Ring Multicomputer Interconnect: Architecture and Signal Processing Performance VLSI光子环多计算机互连:体系结构和信号处理性能
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-05-01 DOI: 10.1007/s11265-005-4938-2
R. Chamberlain, M. Franklin, P. Krishnamurthy, Abhijit Mahajan
{"title":"VLSI Photonic Ring Multicomputer Interconnect: Architecture and Signal Processing Performance","authors":"R. Chamberlain, M. Franklin, P. Krishnamurthy, Abhijit Mahajan","doi":"10.1007/s11265-005-4938-2","DOIUrl":"https://doi.org/10.1007/s11265-005-4938-2","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"18 1","pages":"57-72"},"PeriodicalIF":0.0,"publicationDate":"2005-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90589116","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System 用于数据密集型体系结构(DIVA)系统的内存处理(PIM)芯片原型
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-05-01 DOI: 10.1007/s11265-005-4939-1
J. Draper, T. Barrett, J. Sondeen, S. Mediratta, C. Kang, Ihn Kim, Gokhan Daglikoca
{"title":"A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System","authors":"J. Draper, T. Barrett, J. Sondeen, S. Mediratta, C. Kang, Ihn Kim, Gokhan Daglikoca","doi":"10.1007/s11265-005-4939-1","DOIUrl":"https://doi.org/10.1007/s11265-005-4939-1","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"59 1","pages":"73-84"},"PeriodicalIF":0.0,"publicationDate":"2005-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88755522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
New Models of Prefix Adder Topologies 前缀加法器拓扑的新模型
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-05-01 DOI: 10.1007/s11265-005-4942-6
N. Burgess
{"title":"New Models of Prefix Adder Topologies","authors":"N. Burgess","doi":"10.1007/s11265-005-4942-6","DOIUrl":"https://doi.org/10.1007/s11265-005-4942-6","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"1 1","pages":"125-141"},"PeriodicalIF":0.0,"publicationDate":"2005-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79718958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
PLX: An Instruction Set Architecture and Testbed for Multimedia Information Processing 多媒体信息处理的指令集体系结构与测试平台
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-05-01 DOI: 10.1007/s11265-005-4940-8
R. B. Lee, A. M. Fiskiran
{"title":"PLX: An Instruction Set Architecture and Testbed for Multimedia Information Processing","authors":"R. B. Lee, A. M. Fiskiran","doi":"10.1007/s11265-005-4940-8","DOIUrl":"https://doi.org/10.1007/s11265-005-4940-8","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"37 1","pages":"85-108"},"PeriodicalIF":0.0,"publicationDate":"2005-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90703778","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Adaptive-Hierarchical-Filtering Technique for High-Quality Magazine Image Reproduction 高质量杂志图像再现的自适应层次滤波技术
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-03-01 DOI: 10.1007/S11265-005-4842-9
Tsungnan Lin, J. Shu
{"title":"Adaptive-Hierarchical-Filtering Technique for High-Quality Magazine Image Reproduction","authors":"Tsungnan Lin, J. Shu","doi":"10.1007/S11265-005-4842-9","DOIUrl":"https://doi.org/10.1007/S11265-005-4842-9","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"96 3 1","pages":"237-247"},"PeriodicalIF":0.0,"publicationDate":"2005-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91334261","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Digital Signal Processing with Interleaved ADC Systems 交错ADC系统的数字信号处理
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-03-01 DOI: 10.1007/s11265-005-4844-7
Y. Jenq
{"title":"Digital Signal Processing with Interleaved ADC Systems","authors":"Y. Jenq","doi":"10.1007/s11265-005-4844-7","DOIUrl":"https://doi.org/10.1007/s11265-005-4844-7","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"2012 1","pages":"267-271"},"PeriodicalIF":0.0,"publicationDate":"2005-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73786912","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Combining Extended Retiming and Unfolding for Rate-Optimal Graph Transformation 结合扩展重定时和展开的速率最优图变换
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-03-01 DOI: 10.1007/s11265-005-4845-6
T. O'Neil, E. Sha
{"title":"Combining Extended Retiming and Unfolding for Rate-Optimal Graph Transformation","authors":"T. O'Neil, E. Sha","doi":"10.1007/s11265-005-4845-6","DOIUrl":"https://doi.org/10.1007/s11265-005-4845-6","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"69 1","pages":"273-293"},"PeriodicalIF":0.0,"publicationDate":"2005-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85798319","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Pipelined IIR Filter Architecture Using Pole-Radius Minimization 基于极点半径最小化的流水线IIR滤波器结构
Journal of VLSI signal processing systems for signal, image, and video technology Pub Date : 2005-03-01 DOI: 10.1007/s11265-005-4848-3
N. Boston
{"title":"Pipelined IIR Filter Architecture Using Pole-Radius Minimization","authors":"N. Boston","doi":"10.1007/s11265-005-4848-3","DOIUrl":"https://doi.org/10.1007/s11265-005-4848-3","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"13 1","pages":"323-331"},"PeriodicalIF":0.0,"publicationDate":"2005-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75729163","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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