{"title":"A Memristive Circuit for Gait Pattern Classification Based on Self-Organized Axon Growth","authors":"Dennis Michaelis, K. Ochs, S. Jenderny","doi":"10.1109/MWSCAS47672.2021.9531806","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531806","url":null,"abstract":"Circuit implementations of neuronal networks should also consider dynamic axon models, since this introduces an additional dynamic aspect due to the transmission delays depending on the axon length. In this work, we derive an electrical circuit for self-organized axon growth based on which we design a neuronal network for learning and classifying gait patterns. We do so by utilizing a wave digital model of the axon model with growth concept, from which we can deduce the corresponding electrical circuit. Here, the axon growth is based on Jaumann structures with memristors. Emulation results show that after the successful training of the network, it can indeed recognize the correct gait patterns. In contrast to typical neuronal networks, this training is not based on synaptic weight changes but on the self-organized axon growth and hence delay-selection. Due to the additional degree of freedom, this can allow for a richer dynamic behavior of modeled neuronal networks.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"95 1","pages":"162-165"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86417566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Hendrik Wöhrle, M. D. L. Alvarez, Fabian Schlenke, A. Walsemann, M. Karagounis, F. Kirchner
{"title":"Surrogate Model based Co-Optimization of Deep Neural Network Hardware Accelerators","authors":"Hendrik Wöhrle, M. D. L. Alvarez, Fabian Schlenke, A. Walsemann, M. Karagounis, F. Kirchner","doi":"10.1109/MWSCAS47672.2021.9531708","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531708","url":null,"abstract":"In this paper, we present an ASIC based on 22FDX/FDSOI technology for the detection of atrial fibrillation in human electrocardiograms using neural networks. The ASIC consists of a RISC-V core for supporting software components and an application-specific machine learning IP core (ML-IP), which is used to implement the computationally intensive inference. The ASIC was designed for maximum energy efficiency. A special feature of the ML-IP is its modular, generic and scalable design of the ML-IP which allows to specify the quantization of each computational operation, the degree of parallelization and the architecture of the neural network. This in turn allows the use of ML-based optimization techniques to perform co-optimization for hardware design and architecture of the neural network (NNs). Here, a multi-objective optimization of the overall system is performed with respect to computational efficiency at a given classification accuracy and speed by using a multi-objective optimization, which is carried out using a probabilistic surrogate model. This model tries to find the optimal neural network architecture with a minimum number of training, simulation and evaluation steps.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"28 1","pages":"40-45"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78525140","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Machine Learning Based Smart Contact-less pH Sensing and Classification","authors":"M. Saberi, S. Gardner, M. Haider","doi":"10.1109/MWSCAS47672.2021.9531918","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531918","url":null,"abstract":"With the ever increasing world population, there is a critical need for healthy food resources. Fish are the most environmentally-friendly animal protein to produce, efficiently converting feed into meat while generating a fraction of the greenhouse gasses of livestock production. Therefore, fish farming is one of the most important fields for a sustainable future. Since there is no way for fishes in fish farming pools to migrate into healthier water, a key factor in this industry is to maintain the water quality in standard conditions. Out of different key measurements used to quantify water quality, pH is among the essentials. In this study a portable, cheap, non contact, reusable, and machine learning-based pH sensing system is introduced. This helps farmers to quantify the pH quality of their pools without spending significant amounts of money on measurement equipment. This work introduces a sensitive, non-invasive and reflection-based optical sensor along with an Autoencoder-ESN framework for pH sensing. Using the Autoencoder guarantees at least 5 percent better classification in comparison with simple Echo State Networks. Long lifetimes of the sensor along with high sensitivity of the machine learning algorithm makes this system valuable for local farmers.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"12 1","pages":"1049-1052"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78804837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Bootstrapping Techniques for Energy-Efficient SAR ADCs : A State-of-the-Art Review","authors":"F. Yuan","doi":"10.1109/MWSCAS47672.2021.9531736","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531736","url":null,"abstract":"This paper provide a comparative study of design techniques for bootstrapping in the sample-and-hold of energy-efficient successive approximation register analog-to-digital converters (SAR ADCs). The need for bootstrapping is investigated. It is followed with an in-depth examination of the design, advantages, and disadvantages of bootstrapped switches. Design considerations in choosing bootstrapping capacitors and negative-gating capacitor in low-leakage bootstrapped switches are investigated. The nonlinearity and power consumption of bootstrapped switches are compared and the impact of supply voltage reduction on the nonlinearity and power consumption of bootstrapped switches is investigated utilizing TSMC 130 nm 1.2 V CMOS technology.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"8 1","pages":"575-578"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84299501","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Muhammad Hataba, Ahmed B. T. Sherif, Reem Elkhouly
{"title":"A Proposed Software Protection Mechanism for Autonomous Vehicular Cloud Computing","authors":"Muhammad Hataba, Ahmed B. T. Sherif, Reem Elkhouly","doi":"10.1109/MWSCAS47672.2021.9531682","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531682","url":null,"abstract":"Cars are becoming smarter every day. They are being equipped with sensors, communications interfaces, and more powerful processing capabilities. The primary purpose was to enable these cars to drive themselves without any human interventions and become so-called Autonomous Vehicles (AVs). But why stop there, why not harness all that computing power for a greater collective purpose. That’s how the idea of Autonomous Vehicular Cloud Computing (AVCC) was born. Nonetheless, this is not a trivial task, the mobile and dynamic nature of vehicles poses a significant challenge in the formation and management of this cloud computing model and yet a more substantial challenge in terms of security and privacy of all the parties involved in this system. In this paper, we focus on protecting software running on AVCC. We use dynamic obfuscated compilation to complicate programs’ execution paths and hinder information leakage via side channels attacks. Relying on compilers offers advantages, such as the independence of architecture and support for a variety high-level programming languages and application simplicity with minimal set-up cost. Here, we introduce our system in the realm of ARM processor, which power AVCC. Then, we present execution statistics for simple standard programs. The results show tangible timing variations in diversified code versions for the same program, which may disrupt side-channel attacks.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"60 1","pages":"878-881"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84519506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Real-Time Analog Event-Detection for Event-Based Synchronous Sampling of Sparse Sensor Signals","authors":"Saleh Bunaiyan, Feras Al-Dirini","doi":"10.1109/MWSCAS47672.2021.9531687","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531687","url":null,"abstract":"The unprecedented rise of the internet-of-things (IoT) has led to an enormous rate of data generation from sensors and IoT devices, calling for an urgent need for more intelligent approaches of data acquisition from such sensors. This paper proposes an event-based sampling technique for selective acquisition of event-data from sparse sensor signals, produced by remote sensors and IoT devices. The proposed technique simultaneously combines advantageous features of uniform (synchronous) and non-uniform (asynchronous) techniques. In the proposed approach, event-detection is achieved in real-time in the analog domain, prior to analog-to-digital conversion (ADC) and digital processing, by means of an analog event-detection (AED) circuit. A proof-of-concept design for the AED circuit is implemented and analyzed through experiments and extensive SPICE simulations, demonstrating its capability of detecting the onset of an event in real-time; with speeds on the order of microseconds. Such rapid analog event-detection can enable the real-time control of the sampling process, such that no sampling would occur unless there is an event, giving rise to a richer information content in the acquired data. Moreover, the proposed technique allows all system blocks to remain in sleep-mode until an event is detected, dramatically reducing their overall power consumption. The impact of the proposed technique is further demonstrated on an important industrial application; seismic data acquisition, by testing the design - through SPICE simulation – on real seismic data obtained from seismic surveys for oil and gas exploration.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"485 1","pages":"1053-1057"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88199236","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Inductive Noise Coupling in Superconductive Passive Transmission Lines","authors":"G. Krylov, E. Friedman","doi":"10.1109/MWSCAS47672.2021.9531837","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531837","url":null,"abstract":"Superconductive niobium-based circuits is a promising energy efficient beyond-CMOS technology that can supplement or replace existing large scale CMOS systems. Modern superconductive circuits utilize more than ten metal layers for gates and interconnect. Many sources of inductive coupling noise exist within this environment. Superconductive circuits are particularly vulnerable to inductive coupling, as the operation of the logic gates and flip flops depends on precise bias conditions, and the signal magnitude is relatively small. These inductive coupling sources are characterized, and the effects of inductive coupling noise in different circuit structures are described. Guidelines to mitigate the deleterious effects of coupling noise are presented.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"1 1","pages":"727-731"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89116223","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"LEnS: Lifetime Enhancement Coding Scheme for Non-volatile Memory Processors","authors":"Swatilekha Majumdar","doi":"10.1109/MWSCAS47672.2021.9531891","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531891","url":null,"abstract":"Limited write endurance and high write energy consumption per bit restrict the use of emerging non-volatile memory devices. Many studies concentrate on reducing the number of bit-flips per write operation to reduce bottleneck issues. In this paper, we propose a lifetime enhancement scheme for eNVM device-based memories that distributes the number of bit-flips across the bitstream and can improve the endurance and energy performance of the NVM processors. The proposed scheme significantly reduces the number of bit-flips by ≥40% in write-intensive applications and improves the processor’s performance by ~ 55% as compared to content-aware bit-shuffling scheme.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"5 1","pages":"365-368"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90762652","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Programable Bandwidth Bio-medical Amplifier for Multiple Bio-potential Signals Detection Systems","authors":"Israa Y. AbuShawish, S. Mahmoud","doi":"10.1109/MWSCAS47672.2021.9531898","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531898","url":null,"abstract":"This work presents a tunable bandwidth bio-medical amplifier controlled by controlling the gain bandwidth of highly linear rail-to-rail operational amplifier. The proposed bio-medical amplifier capable to accommodate frequencies starts from 50 Hz up to 10 kHz to detect multiple bio-potential signals: EEG, ECG, EMG, PCG and Aps, using fixed and small load capacitance. The proposed bio-medical amplifier simply consists of two stages bio-amplifier each designed with constant Tera ohm MOS pseudo-resistors used as feedback resistors which also provides controllability to the lower cutoff frequency of the overall two stages bio-medical amplifier thus allowing the detection of the small frequency range. Simulations in LT-spice using the 90 nm CMOS model, BSIM4 level = 54 version 4.3 under +1 V supply voltage are performed to validate the performance of the proposed amplifier. High stability is maintained (phase margin ≥ 60°) over the whole frequency ranges and the overall power consumption of the bio-medical amplifier is not exceeding the 3.28 μW. The used op-amp facilitates reaching both rails of the supply voltage.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"17 1","pages":"762-765"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85440599","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Oukaira, Touati Djallel eddine, Ahmad Hassan, Mohamed Ali, Y. Savaria, A. Lakhssassi
{"title":"Thermo-mechanical Analysis and Fatigue Life Prediction for Integrated Circuits (ICs)","authors":"A. Oukaira, Touati Djallel eddine, Ahmad Hassan, Mohamed Ali, Y. Savaria, A. Lakhssassi","doi":"10.1109/MWSCAS47672.2021.9531747","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531747","url":null,"abstract":"This paper evaluates the thermal and thermo-mechanical behavior of a packaged sensor interface embedding several high and low-voltage integrated circuits (ICs). The main objective of this study is to apply a numerical procedure to evaluate the fatigue strength of the layers and materials that, in general, represent one of the weakest parts of integrated electronic devices. Simulations performed with COMSOL Multiphysics® under stable boundary conditions at 25 °C up to 70 °C and transient conditions allow to estimate and plot the thermal map of the embedded ICs. Thermal stresses and their transient distributions are obtained. In addition, the deformations are evaluated to predict the number of cycles until failure of the constituent layers.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"43 1","pages":"630-634"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85572981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}