Informacije Midem-Journal of Microelectronics Electronic Components and Materials最新文献

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Protective Alumina Coatings Prepared by Aerosol Deposition on Magnetocaloric Gadolinium Elements 磁热钆元素气溶胶沉积制备氧化铝防护涂层
IF 1.2 4区 工程技术
Informacije Midem-Journal of Microelectronics Electronic Components and Materials Pub Date : 2019-12-09 DOI: 10.33180/infmidem2019.306
Matej Šadl, Urban Tomc, Uroš Prah, H. Uršič
{"title":"Protective Alumina Coatings Prepared by Aerosol Deposition on Magnetocaloric Gadolinium Elements","authors":"Matej Šadl, Urban Tomc, Uroš Prah, H. Uršič","doi":"10.33180/infmidem2019.306","DOIUrl":"https://doi.org/10.33180/infmidem2019.306","url":null,"abstract":": In this work the preparation of a protective insulating alumina coating on magnetocaloric gadolinium elements was investigated. In order to prepare a dense ceramic coating at room temperature the aerosol deposition technique was used. The study reveals that the powder morphology and particle size are important parameters that influence the deposition efficiency, powder packing and consequently also the density and functional properties of the alumina coating. The optimal powder pre-deposition treatment includes heating the powder to 1150 °C, followed by milling. The deposition of this powder resulted in the preparation of dense alumina coatings with a low specific electrical conductivity of 6.4∙10 −14 Ω −1 m −1 .","PeriodicalId":56293,"journal":{"name":"Informacije Midem-Journal of Microelectronics Electronic Components and Materials","volume":"18 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2019-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84730571","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
An LTspice Simulation Model of Gamma-radiation Effects and Annealing in a Voltage Regulator With a Lateral Serial PNP Transistor With Round Emitters 带圆形发射体的横向串联PNP晶体管稳压器γ辐射效应和退火的LTspice模拟模型
IF 1.2 4区 工程技术
Informacije Midem-Journal of Microelectronics Electronic Components and Materials Pub Date : 2019-12-09 DOI: 10.33180/infmidem2019.304
V. Vukic
{"title":"An LTspice Simulation Model of Gamma-radiation Effects and Annealing in a Voltage Regulator With a Lateral Serial PNP Transistor With Round Emitters","authors":"V. Vukic","doi":"10.33180/infmidem2019.304","DOIUrl":"https://doi.org/10.33180/infmidem2019.304","url":null,"abstract":"The aim of this paper was to determine the reasons for a complex radiation response of the commercial-off-the-shelf LM2940CT5 low-dropout voltage regulator. Examination of this circuit in a gamma-radiation environment disqualified its use when operated with relatively high output currents, while its radiation tolerance was satisfactory when load current was approximately one-tenth (or lower) of the nominal value. In order to obtain a more thorough insight into the radiation response of this integrated circuit, a detailed SPICE model was developed. This model enabled mutual comparison of the influence of serial and driver PNP power transistor parameters: forward emitter current gain, knee current and emitter resistance. The serial lateral PNP power transistor with round emitters was identified as the weakest element that crucially affected the entire circuit radiation tolerance. The effects of gamma-radiation were examined for total doses up to 500 Gy followed by three sequences of isothermal annealing. Detailed characteristics of Beta(Ic) were procured for four different kinds of bias and load conditions during irradiation. The emitter resistance increase of the serial power transistor was a primary reason for the low radiation tolerance of the entire voltage regulator; it was much more influential than the perceived decline of the PNP power transistor forward emitter current gain. The influence of bias and load conditions were analysed with buildup of interface traps and the oxide-trapped charge, which affected the radiation and post-irradiation response of the serial power transistor.","PeriodicalId":56293,"journal":{"name":"Informacije Midem-Journal of Microelectronics Electronic Components and Materials","volume":"7 1","pages":"153-166"},"PeriodicalIF":1.2,"publicationDate":"2019-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79701248","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Electronically tunable current-mode multifunction filter using current-controlled current follower transconductance amplifier 采用电流控制电流跟随器跨导放大器的电子可调谐电流模式多功能滤波器
IF 1.2 4区 工程技术
Informacije Midem-Journal of Microelectronics Electronic Components and Materials Pub Date : 2019-12-09 DOI: 10.33180/10.33180/infmidem2019.303
M. Kumngern
{"title":"Electronically tunable current-mode multifunction filter using current-controlled current follower transconductance amplifier","authors":"M. Kumngern","doi":"10.33180/10.33180/infmidem2019.303","DOIUrl":"https://doi.org/10.33180/10.33180/infmidem2019.303","url":null,"abstract":"A new electronically tunable current-mode multifunction universal filter with three inputs and one output based on current-controlled current follower transconductance amplifier is presented. The proposed filter can realize low-pass, band-pass, high-pass, band-stop and all-pass filtering functions into single topology. For realize these filtering functions, no passive component-matching conditions, no inverting-type input signal requirements and high-output impedance are possessed. Also the proposed filter offers electronic control of the natural angular frequency, low active and passive sensitivities and use of grounded capacitors which is ideal for integrated circuit implementation. The proposed universal biquadratic filter has been used to realize sixth-order filters. PSPICE simulation results are used to confirm the presented theory.","PeriodicalId":56293,"journal":{"name":"Informacije Midem-Journal of Microelectronics Electronic Components and Materials","volume":"71 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2019-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84871146","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Novel Dual Mode Multifunction Filter Employing Highly Versatile VD-DXCC 采用高通用性dvd - dxcc的新型双模多功能滤波器
IF 1.2 4区 工程技术
Informacije Midem-Journal of Microelectronics Electronic Components and Materials Pub Date : 2019-12-09 DOI: 10.33180/infmidem2019.305
Musa Ali Albrni, Mohammad Faseehuddin, J. Sampe, S. Ali
{"title":"Novel Dual Mode Multifunction Filter Employing Highly Versatile VD-DXCC","authors":"Musa Ali Albrni, Mohammad Faseehuddin, J. Sampe, S. Ali","doi":"10.33180/infmidem2019.305","DOIUrl":"https://doi.org/10.33180/infmidem2019.305","url":null,"abstract":"In this research a new highly versatile analog building block (ABB), the voltage differencing dual X current conveyor (VD-DXCC), is proposed. It is employed to synthesize a versatile dual mode biquadratic filter. The proposed filter uses canonical number of passive elements and has inbuilt tunability feature. In addition, the proposed filter can work as multi input single output (MISO) and single input multi output (SIMO) filter in current mode (CM) of operation. Furthermore, the quality factor and pole frequency of the filter can be set independently. The non-ideal gain analysis and sensitivity analysis of the filters is also carried out to study the effect of process variations and process spread on the filter response. The proposed designs are validated using 0.18um Silterra Malaysia process design kit (PDK) in Cadence Virtuoso design software. The parasitic extraction is carried out using Calibre tool from Mentor Graphics. The complete layout of the VD-DXCC is made and post layout simulation results are given for each design. The post layout results are in close agreement with the theoretical analysis.","PeriodicalId":56293,"journal":{"name":"Informacije Midem-Journal of Microelectronics Electronic Components and Materials","volume":"30 5 1","pages":"167-176"},"PeriodicalIF":1.2,"publicationDate":"2019-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90209281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Memory Efficient High Speed Systolic Array Architecture Design with Multiplexed Distributed Arithmetic for 2D DTCWT Computation on FPGA 基于FPGA的二维DTCWT计算多路分布式算法的高效存储高速收缩阵列结构设计
IF 1.2 4区 工程技术
Informacije Midem-Journal of Microelectronics Electronic Components and Materials Pub Date : 2019-12-09 DOI: 10.33180/infmidem2019.301
B. Poornima, A. Sumathi, Cyril Prasanna Raj Premkumar
{"title":"Memory Efficient High Speed Systolic Array Architecture Design with Multiplexed Distributed Arithmetic for 2D DTCWT Computation on FPGA","authors":"B. Poornima, A. Sumathi, Cyril Prasanna Raj Premkumar","doi":"10.33180/infmidem2019.301","DOIUrl":"https://doi.org/10.33180/infmidem2019.301","url":null,"abstract":"This paper presents customized Systolic Array Architecture (SAA) design of Dual Tree Complex Wavelet (DTCWT) sub band computation based on multiplexed Distributive Arithmetic Algorithm (DAA). The proposed architecture is memory efficient and operates at frequencies greater than 300 MHz in decomposing 256 x 256 input images. Three architectures such as reduced order structure, multiplexed DA structure and zero pad structure are designed and evaluated for its performances for DTCWT computation minimizing arithmetic operations with improved latency. The proposed design is modeled in Verilog HDL and is implemented on Spartan-6 and Virtex-5 FPGA considering Xilinx ISE FPGA design flow. The latency of proposed architectures is evaluated to be 15 clock cycles and throughput is estimated to be 4 outputs for every 5 clock cycles. The SAA architecture occupies less than 12% of FPGA resources and consumes less than 10 mW of power on FPGA platform.","PeriodicalId":56293,"journal":{"name":"Informacije Midem-Journal of Microelectronics Electronic Components and Materials","volume":"11 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2019-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84317902","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Simulation on the Interfacial Singular Stress-strain Induced Cracking of Microelectronic Chip Under pPower On-off Cycles 电源开关循环下微电子芯片界面奇异应力-应变裂纹的模拟
IF 1.2 4区 工程技术
Informacije Midem-Journal of Microelectronics Electronic Components and Materials Pub Date : 2019-09-23 DOI: 10.33180/infmidem2019.203
Xiaoguang Huang
{"title":"Simulation on the Interfacial Singular Stress-strain Induced Cracking of Microelectronic Chip Under pPower On-off Cycles","authors":"Xiaoguang Huang","doi":"10.33180/infmidem2019.203","DOIUrl":"https://doi.org/10.33180/infmidem2019.203","url":null,"abstract":"Thermal fatigue failure of a microelectronic chip usually initiates from the interface between solder joint and substrate for the mismatch in coefficient of thermal expansion (CTE). Because of the viscoelastic creep properties of the solder, the interfacial stress-strain are, strongly, temperature and time dependent. Based on the established constitutive models of solder materials, the three-dimensional FEM analysis of the microelectronic chip undergoing power on-off thermal cycles is carried out. The time dependent stress-strain singular fields at the solder/substance interface are obtained, and the singular field parameters are quantitatively evaluated. Furthermore, the crack nucleation behavior of thermal fatigue failure are tested to verify the conclusion that singular stress-strain promote thermal fatigue failure from the solder/substance interface.","PeriodicalId":56293,"journal":{"name":"Informacije Midem-Journal of Microelectronics Electronic Components and Materials","volume":"11 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2019-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84292284","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Piezoelectric Micropump Driving Module with Programmable Slew-Rate and Dead-Time 具有可编程回转速率和死区时间的压电微泵驱动模块
IF 1.2 4区 工程技术
Informacije Midem-Journal of Microelectronics Electronic Components and Materials Pub Date : 2019-09-23 DOI: 10.33180/infmidem2019.206
M. Mozek, B. Pecar
{"title":"Piezoelectric Micropump Driving Module with Programmable Slew-Rate and Dead-Time","authors":"M. Mozek, B. Pecar","doi":"10.33180/infmidem2019.206","DOIUrl":"https://doi.org/10.33180/infmidem2019.206","url":null,"abstract":": High efficiency piezoelectric micropump driving module with programmable slew-rate and dead-time has been designed, implemented and characterized for driving custom made piezoelectric micropumps. Developed driver enables independent setting of several rectangular output signal parameters, such as frequency, positive and negative amplitudes, slew-rates, dead time, and modes of operation (pump/valve). Implemented driver can achieve amplitudes up to 250 VPP on a frequency range from DC to 1 kHz, slew-rate up to 18 V/µs at maximum power consumption 1.6 W (180 mA @ 9 V). In comparison with our previous driver with RC charge/discharge signal shape, presented version increases air flow capability of micropumps from 1.6 sccm to 4.2 sccm. It enables driving of 200 µm thick PZT actuators with 12 nF capacitance.","PeriodicalId":56293,"journal":{"name":"Informacije Midem-Journal of Microelectronics Electronic Components and Materials","volume":"87 3 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2019-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77966793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
"Fault Prediction of Online Power MeteringEquipment Based on Hierarchical Bayesian Network" 基于层次贝叶斯网络的在线电力计量设备故障预测
IF 1.2 4区 工程技术
Informacije Midem-Journal of Microelectronics Electronic Components and Materials Pub Date : 2019-09-23 DOI: 10.33180/infmidem2019.205
Daosheng Cheng, Penghe Zhang, Fan Zhang, Jiayu Huang
{"title":"\"Fault Prediction of Online Power Metering\u0000Equipment Based on Hierarchical Bayesian Network\"","authors":"Daosheng Cheng, Penghe Zhang, Fan Zhang, Jiayu Huang","doi":"10.33180/infmidem2019.205","DOIUrl":"https://doi.org/10.33180/infmidem2019.205","url":null,"abstract":"The failure rate assessment of online metering equipment is significan t for power metering. For traditional methods, the performance of the model is not satisfactory especially in the case of small samples. In this paper, a n online power measuring equipment fault evaluation method based on Weibull parameter hierarchical Bayesian model is proposed. Firstly, the z-score method is used to eliminate outliers in the raw failure data. Then, a generalized linear function with variable intercept is established according to the characteristics of failure data. The information of each region is merged using the characteristics of multi-layer Bayesian network uncertainty reasoning. The model parameters are updated based on the Markov chain Monte Carlo method. Thereafter, the trend of failure rate is provided with time-dependent. Finally, the proposed method is verified by the failure samples of the online measurement equipment in three typical environmental areas. The accuracy and validity of the hierarchical Bayesian model is verified by a series of experiments","PeriodicalId":56293,"journal":{"name":"Informacije Midem-Journal of Microelectronics Electronic Components and Materials","volume":"16 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2019-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87002187","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Implementation of a Digital TRNG Using Jitter Based Multiple Entropy Source on FPGA 基于抖动的多熵源数字TRNG的FPGA实现
IF 1.2 4区 工程技术
Informacije Midem-Journal of Microelectronics Electronic Components and Materials Pub Date : 2019-09-23 DOI: 10.33180/infmidem2019.204
Ali Murat Garipcan, E. Erdem, Firat
{"title":"Implementation of a Digital TRNG Using Jitter Based Multiple Entropy Source on FPGA","authors":"Ali Murat Garipcan, E. Erdem, Firat","doi":"10.33180/infmidem2019.204","DOIUrl":"https://doi.org/10.33180/infmidem2019.204","url":null,"abstract":": In this study, hardware implementation and evaluation of a true random number generator (TRNG) is presented. For the implementation, Field Programmable Gate Array (FPGA) hardware, in which numerical processes based on an algorithmic basis are carried out, was used. In the system, ring oscillators (ROs) with similar structures were used as a noise source, and true randomness was obtained by sampling the jitter signals originating from the oscillators. However, the most critical cryptographic disadvantage of jitter-based TRNGs is the statistical inadequacy of the system. At this point, in contrast to existing designs, entropy sources derived from the subsets of ROs were used in the sampling and post-processing stage. The statistical quality of the system was improved by using true random numbers/inputs obtained from these entropy sources in the sampling and post-processing stage. With sampling and post-processing inputs, the use of complex post-processing techniques that limit the output bit rate of the generator in the system was not required. Thus, a high-performance adaptable TRNG model with reduced hardware resource consumption is obtained. The statistical validation of the TRNG, which was tested in 6 different scenarios for two separate ring oscillator (RO) architectures and three different operating frequencies, was performed with the NIST 800-22 and AIS31 test packages.","PeriodicalId":56293,"journal":{"name":"Informacije Midem-Journal of Microelectronics Electronic Components and Materials","volume":"106 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2019-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75740570","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Linearly Tunable CMOS Voltage Differencing Transconductance Amplifier (VDTA) 线性可调谐CMOS压差跨导放大器(VDTA)
IF 1.2 4区 工程技术
Informacije Midem-Journal of Microelectronics Electronic Components and Materials Pub Date : 2019-09-23 DOI: 10.33180/infmidem2019.202
W. Tangsrirat
{"title":"Linearly Tunable CMOS Voltage Differencing Transconductance Amplifier (VDTA)","authors":"W. Tangsrirat","doi":"10.33180/infmidem2019.202","DOIUrl":"https://doi.org/10.33180/infmidem2019.202","url":null,"abstract":"This paper proposes an alternative way to implement the CMOS voltage differencing transconductance amplifier (VDTA) with linearly tunable.  It has been designed by using the floating current source (FCS) and the current squaring circuit. The circuit achieves its linear tunability by squaring the long-tail biasing current of the FCS.  In this way, the transconductance gains of the proposed CMOS VDTA can be varied linearly through adjusting the DC bias currents. As an application example, the proposed VDTA is used in the design of an actively tunable voltage-mode multifunction filter. The derived filter possesses the following desirable properties: simultaneous realization of three standard filter functions; employment of only two grounded capacitors; and electronic tunability of w o and Q .  The performance of the proposed circuit and its filter design application were examined by PSPICE simulations with TSMC 0.25- m m CMOS real process technology.","PeriodicalId":56293,"journal":{"name":"Informacije Midem-Journal of Microelectronics Electronic Components and Materials","volume":"16 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2019-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86377115","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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