{"title":"Efficient Revocable Attribute-Based Encryption with Intel SGX","authors":"Chenyang Zhao;Ying Gao;Xinrui Yang;Shuqing Zhang;Fengwei Zhang","doi":"10.23919/cje.2025.00.287","DOIUrl":"https://doi.org/10.23919/cje.2025.00.287","url":null,"abstract":"Cloud storage has transformed data sharing for individuals and organizations, but it also raises significant privacy concerns. Attribute-based encryption (ABE) enables fine-grained access control over encrypted data on untrusted servers, offering advantages over traditional symmetric or public-key encryption. However, with the advent of quantum computing, classical bilinear pairing-based ABE schemes face long-term security risks. Lattice-based ABE emerges as a promising post-quantum alternative, yet existing constructions suffer from large key/ciphertext sizes, inefficient Gaussian preimage sampling, and limited revocation support. To address these challenges, we propose trusted environment revocable ABE (TR-ABE), a lattice-based revocable ciphertext-policy ABE scheme explicitly designed for Intel Software Guard Extensions (SGX). By leveraging the SGX enclave, Gaussian SamplePre operations are securely outsourced while preserving confidentiality against side-channel leakage under the transparent trusted execution environment model. TR-ABE further adopts an attribute-aggregated key structure to enable efficient, resampling-free key updates, and supports efficient revocation with cryptographic binding of user identities to resist collusion. A cloud trusted execution environment framework ensures secure ciphertext updates with enclave integrity guarantees. We formally prove indistinguishability under chosen-plain-text attack security and collusion resistance under the ring learning with errors assumption in the standard model. Both theoretical analysis and experimental evaluation demonstrate significant improvements in revocation efficiency and up to 7.3× performance improvement in SamplePre through secure outsourcing in Intel SGX.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"35 3","pages":"1224-1245"},"PeriodicalIF":4.5,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11595436","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148443332","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Novel Single Error Correction Double Error Detection Double Adjacent Error Correction Algorithm with Zero Error Rate","authors":"Sheng Liu;Bo Yuan;Danning Wang;Guixiang Chen;Yang Guo","doi":"10.23919/cje.2024.00.293","DOIUrl":"https://doi.org/10.23919/cje.2024.00.293","url":null,"abstract":"In harsh environments like space, multiple cell upsets severely threaten the reliability of on-chip memories. While single error correction-double error detection-double adjacent error correction (SEC-DED-DAEC) codes are effective against adjacent double-bit errors, a critical challenge remains: many existing implementations are prone to miscorrecting certain non-adjacent double-bit errors, creating a reliability vulnerability. Furthermore, current solutions often suffer from poor scalability or significant hardware overhead. This paper addresses these challenges by proposing a novel SEC-DED-DAEC algorithm that guarantees a zero error rate for all double-bit errors. The proposed algorithm is highly scalable, capable of generating optimized check matrices for data widths ranging from 8 to 512 bits. Through a systematic construction and optimization process, our approach not only eliminates miscorrection but also reduces redundancy. Compared to state-of-the-art zero-errorrate SEC-DED-DAEC schemes, our method requires fewer check bits, demonstrates superior scalability, and as verified by hardware synthesis, results in lower area, latency, and power consumption in its encoder and decoder circuits.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"35 2","pages":"866-876"},"PeriodicalIF":3.0,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11554551","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148196150","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Kunwei Yang;Yanwei Zhou;Bo Yang;Tao Wang;Zeyi Zhao;Yue Cao
{"title":"A Blockchain-Based Secure Data Sharing Mechanism in Crowdsourcing Using Continuous Leakage-Resilient Identity-Based Encryption","authors":"Kunwei Yang;Yanwei Zhou;Bo Yang;Tao Wang;Zeyi Zhao;Yue Cao","doi":"10.23919/cje.2025.00.161","DOIUrl":"https://doi.org/10.23919/cje.2025.00.161","url":null,"abstract":"Crowdsourcing technology utilizes mobile sensing devices as basic sensing units to accomplish task allocation and data collection. Currently, it has emerged as a novel approach for addressing large-scale and intricate tasks. However, the collected sensing data often contain valuable information, necessitating careful consideration of data privacy. Traditional data privacy protection schemes are predominantly centralized, which makes them susceptible to single-point failures, trust crises, and scalability issues. Meanwhile, these traditional schemes fail to account for the risk of key leakage resulting from side-channel attacks within real network environments. Therefore, a distributed and leakage-resilient privacy protection mechanism has great practical value in crowd-sourcing applications. To this end, we propose a blockchain-based secure data sharing mechanism for crowdsourcing applications. Our main contribution is to propose an identity-based encryption scheme that achieves continuous leakage-resilient security. From the adversary's perspective, the ciphertext structure in the scheme seems completely random, making it infeasible to extract private key information. We establish the proposed scheme's chosen-ciphertext attack security under the selective-ID model, relying on the decisional weaker bilinear Diffie-Hellman inversion assumption. Theoretical analysis validates the scheme's advantages, feasibility, and effectiveness.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"35 3","pages":"1256-1268"},"PeriodicalIF":4.5,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11595437","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148443339","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Wenquxing 22: A Highly Efficient Neuromorphic Accelerator by RISC-V Customized Instruction Extension for Spiking Neural Network (RV-SNN 1.0), Streamlined LIF Model and Binary Stochastic STDP","authors":"Jiulong Wang;Jixiang Zong;Ruopu Wu;Boran Liu;Xuhao Chen;Guokai Chen;Di Zhao","doi":"10.23919/cje.2024.00.309","DOIUrl":"https://doi.org/10.23919/cje.2024.00.309","url":null,"abstract":"This paper proposes Wenquxing 22: A neuromorphic processor to efficiently compute a spiking neural network (SNN) with RISC-V extension instructions. The main idea of Wenquxing 22 is to integrate the SNN computing unit into the pipeline of a generic in-order processor to achieve neuromorphic computing by customized RISC-V SNN instruction extensions 1.0 (RV-SNN 1.0). To integrate the leaky integrate-and-fire (LIF) model into the in-order processor, we prune the complex traditional LIF model called the streamlined LIF model, and apply it to the pipeline. The binary stochastic spike-timing-dependent-plasticity (STDP) with binary synaptic weights is also proposed to achieve the power efficiency of Wenquxing 22. The experimental results show that, on Xilinx Alveo U250, working in 300 MHz with pure 1-bit 2-layer SNN, the effective peak power efficiency of Wenquxing 22 reaches 2.4 TSOPS/W (tera synaptic operations per second per Watt) and the area efficiency reaches 339.9 SOP/LUT (synaptic operations per look up table); the peak classification accuracy on modified national institute of standards and technology database (MNIST) is 95.75%. We also evaluate the power consumption of physical chip of Wenquxing 22 on Development Board, and the result is 2.48 W. Wenquxing 22 outperforms than the existing open-source spiking systems. The Source code of Wenquxing 22 is https://gitee.com/OpenBPU/OpenBPU1.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"35 2","pages":"453-461"},"PeriodicalIF":4.5,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11554561","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148499219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Tlsys: A Synthesis Framework for Ternary Logic from RTL to CNFET-Based Gate-Level Netlist","authors":"Jiayi Li;Yao Wang;Yunxia Chen;Yimin Wei;Ziteng Li;Zhijie Yang;Shi Xu;Lei Wang;Yuhua Tang","doi":"10.23919/cje.2025.00.418","DOIUrl":"https://doi.org/10.23919/cje.2025.00.418","url":null,"abstract":"Ternary logic, as a representative form of multi-valued logic, provides a promising alternative to binary logic by enabling reductions in circuit area, power consumption, and interconnect complexity. Existing ternary logic synthesis tools primarily focus on logic simplification of small-scale circuits, lacking support for design automation of large-scale circuit designs. To address these limitations, we propose ternary logic synthesis system (Tlsys), the first synthesis framework that synthesizes ternary register-transfer-level (RTL) designs into gate-level netlists. By proposing a ternary Verilog description guidelines, Tlsys enables the RTL design of large-scale ternary circuits. Furthermore, translation and mapping methodologies are proposed to transform ternary RTL into an equivalent carbon nanotube field-effect transistors (CNFET)-based gate-level netlist. In addition, a verification methodology for ternary netlists is proposed. Compared with other ternary logic synthesis tools, Tlsys demonstrates a capability in handling large-scale circuit designs. The gate-level netlists synthesized in the experiments contain over 500,000 gates and have been verified using standard tools.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"35 2","pages":"434-443"},"PeriodicalIF":4.5,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11554546","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148506312","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Di Zhou;Xiao Jia;Min Sheng;Liuying Wang;Yan Shi;Jiandong Li
{"title":"Differentiated Services Driven Distributed Inter-Satellite Handover Management in Mega Satellite Networks","authors":"Di Zhou;Xiao Jia;Min Sheng;Liuying Wang;Yan Shi;Jiandong Li","doi":"10.23919/cje.2025.00.085","DOIUrl":"https://doi.org/10.23919/cje.2025.00.085","url":null,"abstract":"Inter-satellite handover management is critical to ensuring seamless service continuity and quality of service (QoS) in mega-scale satellite networks. However, traditional ground-centric handover architectures struggle with excessive signaling overhead and latency as networks scale to accommodate emerging services (e.g., remote control, broadband civil aviation, personal broadband). To address these differentiated services, we propose a space-ground distributed inter-satellite handover control architecture (SGDISHCA) that migrates radio resource control (RRC) and authentication management function (AMF) to satellites, establishing a distributed control paradigm. Specifically, we analyze the influence of the minimum elevation angle between the ground location area and the satellite on the delay and handover times, and establish the satellite-location area correlation model. According to the model, we design an on-demand allocation algorithm that dynamically aligns channel allocation rates with heterogeneous service demand rates, jointly optimizing QoS guarantees and resource efficiency. Through the analysis of simulation results, we validate that our proposed scheme reduces handover delays and signaling overhead. Furthermore, our scheme exhibits a remarkable enhancement in user satisfaction and optimization of system resource utilization. We also investigate the effect of ground station distribution on network performance and find that the network performance exhibits marked improvements with fewer and denser ground stations, facilitated by the on-demand allocation algorithm.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"35 3","pages":"1058-1072"},"PeriodicalIF":4.5,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11595291","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148506683","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Xinyu Yang;Shenyuan Chen;Yuhang Zhang;Debo Wang;Licheng Deng
{"title":"A Novel Folding Semi-Circular Shaped Piezoelectric Energy Harvester","authors":"Xinyu Yang;Shenyuan Chen;Yuhang Zhang;Debo Wang;Licheng Deng","doi":"10.23919/cje.2025.00.300","DOIUrl":"https://doi.org/10.23919/cje.2025.00.300","url":null,"abstract":"To overcome the inherent limitations of traditional piezoelectric energy harvesters (PEHs), such as narrow bandwidth, low power density, and unidirectional energy harvesting constraints, a folded semi-circular piezoelectric energy harvester (FSC-PEH) is proposed. Compared to conventional cantilever beam structures, this folded design achieves significant volume reduction. The semi-circular cantilever configuration also enables superior multi-directional energy harvesting and allows for frequency response tuning by adjusting the angle of the auxiliary beams and the size of the proof mass. Four FSC-PEH variants with different auxiliary beam angles were designed and experimentally measured. The configuration with a 0° auxiliary beam angle (designated PEH-A) demonstrated the best performance. Under a 0.1g acceleration, PEH-A exhibited two distinct resonance peaks at 76 Hz and 106 Hz. The corresponding open-circuit voltages reached 14.60 V and 18.64 V, respectively. The normalized power density (NPD) for the first mode is 15.3 <tex>$mu mathrm{W}cdot mathrm{g}^{-2}cdot text{mm}^{-3}$</tex>. When the base excitation is offset by 45°, the voltage at the first-order resonant frequency drops to 8.98 V (approximately 61.5% of the peak value), and the voltage at the second-order resonant frequency drops to 13.95 V (approximately 74.8% of the peak value). This vividly demonstrates its ability to collect energy in multiple directions. After integrating an adaptive power management module, the system is able to stably output a 3.3 V direct current voltage under 0.1g vibration. This output successfully powered a low-power temperature and humidity sensor (AHT10), enabling its normal operation. Therefore, this piezoelectric energy harvesting system shows promise for effectively powering low-power chips and sensors in applications such as rail transit and the Internet of things.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"35 3","pages":"935-945"},"PeriodicalIF":4.5,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11595293","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148506686","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Pilot Contamination-Aware Lightweight HQCNN Algorithm for mURLLC in AI-Agent Communication Networks","authors":"Yuting Zhang;Jie Zeng;Wei Feng;Tiejun Lyu","doi":"10.23919/cje.2025.00.294","DOIUrl":"https://doi.org/10.23919/cje.2025.00.294","url":null,"abstract":"Artificial intelligence-agent communication networks (ACNs) have emerged as a key scenario in the future sixth-generation communication systems, where autonomous agents require massive ultra-reliable and low-latency communications (mURLLC) for real-time collaboration under cell-free architecture. To support mURLLC requirements, this paper investigates pilot contamination in cell-free massive multiple-input multipleoutput systems. We propose an ACN architecture, derive a closed-form expression for pilot contamination, and propose a light-weight hybrid quantum-classic convolutional neural network (HQCNN) algorithm that leverages quantum parallelism and nonlinear learning to mitigate the pilot contamination effectively. Simulation results show a 99.71% reduction in error probability and a 31.8% improvement in connection density, showing great potential in industrial metaverse and swarm robotics in the next-generation ACNs.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"35 3","pages":"996-1006"},"PeriodicalIF":4.5,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11595424","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148507165","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Process-Compatible Self-Biased PLL with Flexible Reference of 0.001 GHz–1.2 GHz and Output of 0.016 GHz–3.5 GHz","authors":"Hao Sang;Hengzhou Yuan;Yang Guo;Xiaowen Chen;Sheng Liu;Weixia Xu","doi":"10.23919/cje.2025.00.053","DOIUrl":"https://doi.org/10.23919/cje.2025.00.053","url":null,"abstract":"This paper presents a charge pump phase-locked loop (PLL) with an input range of 1 MHz to 1.2 GHz and an output frequency range of 16 MHz to 3.5 GHz. The proposed design employs global self-bias and bandwidth-adaptive techniques, eliminating the need for large bias circuits and reducing power consumption. The circuit is implemented using both planar technology and fin field-effect transistor technology, demonstrating high stability and compatibility in both system-synchronous and source-synchronous applications through experimental validation.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"35 2","pages":"462-468"},"PeriodicalIF":4.5,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11554564","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148506240","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wanli Du;Guangzhi Chen;Xinsong Wang;Tao Zhang;Tiehua Jiang;Guannan Liu;Zongfei Zhou;Donglin Su
{"title":"Enhancing Electromagnetic Parameter Modeling of Irregularly Shaped Composite Structures with Partitioned Equivalent Modeling and Near-Field Scanning","authors":"Wanli Du;Guangzhi Chen;Xinsong Wang;Tao Zhang;Tiehua Jiang;Guannan Liu;Zongfei Zhou;Donglin Su","doi":"10.23919/cje.2025.00.172","DOIUrl":"https://doi.org/10.23919/cje.2025.00.172","url":null,"abstract":"To characterize local electromagnetic parameters in aircraft composite skins containing geometric irregularities, such as curved surfaces and slots, this paper proposes a partitioned equivalent modeling (PEM) method. The proposed method provides a parametric basis for low-frequency electromagnetic shielding effectiveness analysis of complex structures. Within the PEM method, an irregular structure is decomposed into homogeneous equivalent partitions; local equivalent electromagnetic parameters are then extracted through near-field scanning measurements, S-parameter-based inversion, and a physics-guided deep neural network. Numerical simulations show that the proposed method maintains low S-parameter reconstruction errors in the 10 MHz-20 MHz frequency range, with magnitude MSE values at the 10<sup>−6</sup> level. Experimental validation using a near-field measurement system further shows that more than 89% of the scanned regions have relative errors below 0.20%, with a maximum average error of 0.57%. These results indicate that the proposed method offers an effective approach for low-frequency near-field characterization and quantitative modeling of geometrically complex composite structures.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"35 2","pages":"491-505"},"PeriodicalIF":4.5,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11554496","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148506223","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}