2012 Third International Conference on Networking and Computing最新文献

{"title":"An Efficient Method for Displaying Compressed HDR Spectral Images to RGB Display Monitors","authors":"M. Mikamo, Y. Tsuda, B. Raytchev, Toru Tamaki, K. Kaneda","doi":"10.1109/ICNC.2012.33","DOIUrl":"https://doi.org/10.1109/ICNC.2012.33","url":null,"abstract":"In this paper, we propose a novel method for storing high dynamic range (HDR) spectral images compactly and displaying them quickly taking into account the properties of the human visual system (HVS). It is important to display images quickly to various kinds of display monitors with different resolutions. To accelerate the display process, we store the 2D spatial components and 1D spectral components separately in a discrete wavelet transform process. When displaying the image, we first convert the 1D spectral components into RGB tristimulus color components. In the RGB conversion, we make use of the property of orthonormal-basis functions. Then, we retrieve a RGB color image using a part of the spatial components (converted RGB coefficients) depending on the resolution of a display device. Our method makes it possible to efficiently convert and quickly display HDR spectral images to RGB display monitors.","PeriodicalId":442973,"journal":{"name":"2012 Third International Conference on Networking and Computing","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127547038","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Inter-AS Traffic Volume Reduction by Localizing Delivery for P2P Live Streaming","authors":"Kazuki Kobayashi, Y. Fukushima, T. Yokohira","doi":"10.1109/ICNC.2012.31","DOIUrl":"https://doi.org/10.1109/ICNC.2012.31","url":null,"abstract":"In recent years, there is a big demand for live streaming service over the Internet. As one of the service model, peer-to-peer (P2P) live streaming has been utilized. In the system, it is important to decrease inter-AS (Autonomous System) traffic volume and content delivery delay because the larger volume leads to higher transit cost of ASes and this system treats the live contents, respectively. Therefore, as a conventional peer selection algorithm that tries to decrease them, Minimum Physical Hop (MPH) has been proposed. In MPH, to decrease inter-AS traffic volume, a newly joining peer selects a providing peer with the minimum physical hop count, which is the minimum number of ASes between the providing peer and the newly joining peer. Furthermore, to decrease content delivery delay, if there are several such candidates, it selects a providing peer with the minimum logical hop count, which is the number of Origin Streaming Servers (OSS) or peers passed from an OSS to the peer, from the candidates. However, MPH shows high inter-AS traffic volume when the number of joining peers is large. When we use MPH, candidates for providing peer with large logical hop count tend to swarm in ASes without an OSS while those with small logical hop count do in ASes with an OSS because of the peer selection policy of MPH. As the number of joining peers becomes large, the logical hop counts of the candidates for providing peer in every AS increase. As a result, in the former ASes, the logical hop counts of all the candidates for providing peer reach the upper bound frequently, and the newly joining peer cannot often find its providing peer in the AS, and consequently have to select providing peers in different ASes. In this paper, we improve MPH in order to further decrease the inter-AS traffic volume. In the improved algorithm called Improved Minimum Physical Hop (IMPH), we try to decrease the volume by distributing providing peers with one logical hop count to many ASes. As a result of the evaluation, we show that IMPH achieves to reduce the inter-AS traffic volume by at a maximum of 38% compared to MPH under uniform peer generation distributions.","PeriodicalId":442973,"journal":{"name":"2012 Third International Conference on Networking and Computing","volume":"533 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126169775","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Low-overhead Routing Algorithm for 3D Network-on-Chip","authors":"Akram Ben Ahmed, B. Abderazek","doi":"10.1109/ICNC.2012.14","DOIUrl":"https://doi.org/10.1109/ICNC.2012.14","url":null,"abstract":"Despite the higher scalability and parallelism integration offered by Network-on-Chip (NoC) over the traditional shared-bus based systems, it is still not an ideal solution for future large scale Systems-on-Chip (SoCs), due to some limitations such as high power consumption and high cost communication. Recently, extending 2D-NoC to the third dimension (3D-NoC) has been proposed to deal with these problems. One of the most important design choices for 3D-NoC designs is the implementation of a fast and high throughput system with a reasonable hardware complexity. Moreover, adopting an efficient routing algorithm has become an important task since the flits' path selection has a direct impact on the overall system performance. In this paper, we propose a low overhead, and high throughput 3D-NoC routing algorithm named Look-ahead-XYZ (LA-XYZ). We implemented the proposed algorithm in our 3D-NoC deign, named 3D-OASIS-NoC, and we prototyped it on FPGA. We evaluated its performance using Transpose traffic pattern and two selected real applications (JPEG-encoder and Matrix-multiplication). Evaluation results show that the proposed algorithm reduces the communication latency by 29.22% and 35.12% and enhances the throughput with an average of 26% and 38.95% when compared to XYZ and Randomized Partially Minimal (RPM) routing algorithms respectively.","PeriodicalId":442973,"journal":{"name":"2012 Third International Conference on Networking and Computing","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115333033","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Exploration of Non-volatile Memory Management in the OS Kernel","authors":"S. Saito, S. Oikawa","doi":"10.1109/ICNC.2012.56","DOIUrl":"https://doi.org/10.1109/ICNC.2012.56","url":null,"abstract":"Non-volatile memory's future is promising because its performance has been improved significantly. The performance improvement enables non-volatile memory to be a major part of the memory of general purpose systems. Utilization of large non-volatile memory will improve its memory performance because it can decrease the number of the OS's paging activity. To realize these systems, the operating system (OS) needs to manage non-volatile memory in accord with its characteristics. Non-volatile memory has some characteristics, thus the OS should manage this memory with appropriate algorithms. To achieve this goal, we focused on non-volatile memory's characteristics, non-volatile and high-latency, among others. We analyzed the behavior of the OS's memory management and propose how to manage non-volatile memory in the OS kernel. We researched the effect of memory-latency on a system performance and how to manage with hybrid memories.","PeriodicalId":442973,"journal":{"name":"2012 Third International Conference on Networking and Computing","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115505034","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Asynchronous Memory Machine Models with Barrier Synchronization","authors":"K. Nakano","doi":"10.1109/ICNC.2012.18","DOIUrl":"https://doi.org/10.1109/ICNC.2012.18","url":null,"abstract":"The Discrete Memory Machine (DMM) and the Unified Memory Machine (UMM) are theoretical parallel computing models that capture the essence of the shared memory and the global memory of GPUs. It was assumed that warps (i.e. groups of threads) on the DMM and the UMM work synchronously in the round-robin manner. However, warps work asynchronously in the actual GPUs, in the sense that warps may be randomly (or arbitrarily) dispatched for execution. The first contribution of this paper is to introduce an asynchronous version of the DMM and the UMM, in which warps are arbitrarily dispatched. Instead, we assume that threads can execute the “syncthreads” instruction for barrier synchronization. Since the barrier synchronization operation is costly, we should evaluate and minimize the number of barrier synchronization operations performed by parallel algorithms. The second contribution of this paper is to show a parallel algorithm to compute the sum of n numbers in optimal computing time and few barrier synchronization steps. Our parallel algorithm computes the sum of n numbers in O(n/w+ l log n) time units and O(log l/w + log log w) barrier synchronization steps using wl threads both on the asynchronous DMM and on the asynchronous UMM with width w and latency l. We also prove that the computing time is optimal because it matches the theoretical lower bound. Quite surprisingly, the number of barrier synchronization steps and the number of threads are independent of n. Even if the input size n is quite large, our parallel algorithm computes the sum in optimal time units and a fixed number of syncthreads using a fixed number of threads.","PeriodicalId":442973,"journal":{"name":"2012 Third International Conference on Networking and Computing","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114898121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Faster Algorithm for Finding Disjoint Ordering of Sets","authors":"E. Cheng, K. Qiu, Z. Shen","doi":"10.1109/ICNC.2012.25","DOIUrl":"https://doi.org/10.1109/ICNC.2012.25","url":null,"abstract":"Consider the problem of routing from a single source node to multiple target nodes with the additional condition that these disjoint paths be the shortest. This problem is harder than the standard one-to-many routing in that such paths do not always exist. Various sufficient and necessary conditions have been found to determine when such paths exist for some interconnection networks. And when these conditions do hold, the problem of finding such paths can be reduced to the problem of finding a disjoint ordering of sets. We study the problem of finding a disjoint ordering of sets X₁, X₂, X_s where X_i ⊆{1, 2, ···, n} and s ≤ n. We present an O(n³) algorithm for doing so, under certain conditions, thus improving the previously known O(n⁴) algorithm, and consequently, improving the corresponding one-to-many routing algorithms for finding disjoint and shortest paths.","PeriodicalId":442973,"journal":{"name":"2012 Third International Conference on Networking and Computing","volume":"C-24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126475810","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Parallel Numerical Simulation of Visual Neurons for Analysis of Optical Illusion","authors":"A. Egashira, Shunji Satoh, H. Irie, T. Yoshinaga","doi":"10.1109/ICNC.2012.27","DOIUrl":"https://doi.org/10.1109/ICNC.2012.27","url":null,"abstract":"Detailed mechanism of optical illusion caused by visual neurons in human brain has not been well understood, and its numerical simulation is helpful to analyze visual system of humans. This paper describes implementation techniques of parallel numerical simulation to help understanding optical illusion by using a GPU-accelerated PC cluster. Our parallel acceleration techniques include following three points. Firstly, input images of the numerical simulation is efficiently calculated by dividing it images for multiple computation nodes using MPI (Message Passing Interface). Secondly, convolution, which is dominated computation for the optical flow, is accelerated by GPU. Finally, an algorithm to compute convolution specified to analyze optical illusion is proposed to speed up the simulation. Our experimental results show an interesting insight that values of optical flow for images causing optical illusion are quite different compared to that does not cause the optical illusion. We also demonstrate that our implementation of simulation works efficiently on the GPU-accelerated PC cluster.","PeriodicalId":442973,"journal":{"name":"2012 Third International Conference on Networking and Computing","volume":"387 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134179473","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"High-Performance Visualization of Multi-Dimensional Gene Expression Data","authors":"M. Trutschl, P. Kilgore, U. Cvek","doi":"10.1109/ICNC.2012.20","DOIUrl":"https://doi.org/10.1109/ICNC.2012.20","url":null,"abstract":"Previous application of Kohonen's self organizing map to common visualizations has yielded promising results. In this research, we extend the classic two-dimensional scatter plot visualization algorithm into the third dimension by permitting competition to occur within a three-dimensional search space. This approach takes advantage of spatial memory and increases the intrinsic dimensionality of a widely used visualization technique. We also present a method of parallelizing this novel algorithm as a method of overcoming the runtime complexity associated with it using MPI. We note that this algorithm responds extremely well to parallelization and that it leads to an effective method for knowledge discovery in complex multidimensional datasets.","PeriodicalId":442973,"journal":{"name":"2012 Third International Conference on Networking and Computing","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133487268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"An Implementation of Conflict-Free Offline Permutation on the GPU","authors":"Akihiko Kasagi, K. Nakano, Yasuaki Ito","doi":"10.1109/ICNC.2012.42","DOIUrl":"https://doi.org/10.1109/ICNC.2012.42","url":null,"abstract":"The Discrete Memory Machine (DMM) is a theoretical parallel computing model that captures the essence of the shared memory access of GPUs. The bank conflicts should be avoided for maximizing the bandwidth of the shared memory access. Offline permutation of an array is a task to copy all elements in array a into array b along a permutation given in advance. The main goal of this paper is to implement a conflict-free permutation algorithm on the DMM in a GPU. We have also implemented straightforward permutation algorithms on the GPU. The experimental results for 1024 float numbers on NVIDIA GeForce GTX-680 show that a straightforward permutation algorithm takes 246ns and 877ns for random permutation and bit-reversal permutation, respectively. Quite surprisingly, our conflict-free permutation algorithm runs in 165ns both for random permutation and for bit-reversal permutation although it performs more memory access operations. It follows that our conflict-free permutation is 1.5 times faster for random permutation and 5.3 times faster for bit-reversal permutation.","PeriodicalId":442973,"journal":{"name":"2012 Third International Conference on Networking and Computing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131158877","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Multicore Based Spatialk-dominant Skyline Computation","authors":"M. A. Siddique, Asif Zaman, Md. Mahbubul Islam, Y. Morimoto","doi":"10.1109/ICNC.2012.36","DOIUrl":"https://doi.org/10.1109/ICNC.2012.36","url":null,"abstract":"We consider k-dominant skyline computation when the underlying dataset is partitioned into geographically distant computing core that are connected to the coordinator (server). The existing k-dominant skyline solutions are not suitable for our problem, because they are restricted to centralized query processors, limiting scalability and imposing a single point of failure. Moreover, k-dominant skyline computation does not follow transitivity property like skyline computation. In this paper, we developed a multicore based spatial k-dominant skyline (MSKS) computation algorithm. MSKS is a feedback-driven mechanism, where the coordinator iteratively transmits data to each computing core. Computing core is able to prune a large amount of local data, which otherwise would need to be sent to the coordinator. Furthermore, it supports a user-friendly progress indicator that allows user to modify (insert, delete, and update) and monitor the progress of long running k-dominant skyline queries. Extensive performance study shows that proposed algorithm is efficient and robust to different data distributions and achieves its progressive goal with a minimal overhead.","PeriodicalId":442973,"journal":{"name":"2012 Third International Conference on Networking and Computing","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116728906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}