2008 International Symposium on Industrial Embedded Systems最新文献_第4页

FPGA based embedded system for induction motor failure monitoring at the start-up transient vibrations with wavelets 基于FPGA的嵌入式感应电机启动瞬态振动监测系统

2008 International Symposium on Industrial Embedded Systems Pub Date : 2008-06-11 DOI: 10.1109/SIES.2008.4577701

C. Rodriguez-Donate, R. Romero-Troncoso, A. García-Perez, Daniel A. Razo-Montes

引用次数: 31

Verifying programmable logic controllers with abstraction 用抽象验证可编程逻辑控制器

2008 International Symposium on Industrial Embedded Systems Pub Date : 2008-06-11 DOI: 10.1109/SIES.2008.4577704

R. Wang, M. Gu, Xiaoyu Song, Hehua Zhang

引用次数: 2

FPGA based multiple-channel vibration analyzer embedded system for industrial applications in automatic failure detection 基于FPGA的多通道振动分析仪嵌入式系统在工业故障自动检测中的应用

2008 International Symposium on Industrial Embedded Systems Pub Date : 2008-06-11 DOI: 10.1109/SIES.2008.4577705

L. M. Contreras-Medina, R. Romero-Troncoso, J. R. Millán-Almaraz, C. Rodriguez-Donate

{"title":"FPGA based multiple-channel vibration analyzer embedded system for industrial applications in automatic failure detection","authors":"L. M. Contreras-Medina, R. Romero-Troncoso, J. R. Millán-Almaraz, C. Rodriguez-Donate","doi":"10.1109/SIES.2008.4577705","DOIUrl":"https://doi.org/10.1109/SIES.2008.4577705","url":null,"abstract":"Machine monitoring is one of the major concerns in modern industry in order to guarantee the overall efficiency during the production process. Several monitoring techniques for machinery failure detection have been developed, being vibration analysis one of the most important techniques. The typical equipment used for vibration analysis is a general purpose single channel spectrum analyzer that most of the cases is not well suited for the specific task and lacks from the capability of simultaneous multiple channel analysis. The contribution of this work is to present the development of a low-cost FPGA based 3-axis simultaneous vibration analyzer for embedded machinery monitoring with the novelty of a post-processing stage that can be designed and implemented into the same FPGA for automatic online detection of specific machinery failures. Two cases of study are presented to show the development performance and capabilities of the system where specific post-processing units are designed. From the results it can be seen that several mechanical failures can be automatically detected by reconfiguring the postprocessing algorithm, embedded in the system.","PeriodicalId":438401,"journal":{"name":"2008 International Symposium on Industrial Embedded Systems","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125354126","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 19

Application-level fault tolerance in real-time embedded systems 实时嵌入式系统的应用级容错

2008 International Symposium on Industrial Embedded Systems Pub Date : 2008-06-11 DOI: 10.1109/SIES.2008.4577690

Francisco Afonso, C. Silva, A. Tavares, S. Montenegro

引用次数: 22

NCES-based modelling and CTL-based verification of reconfigurable Benchmark Production Systems 基于nces的可重构基准生产系统建模和基于ctl的验证

2008 International Symposium on Industrial Embedded Systems Pub Date : 2008-06-11 DOI: 10.1109/SIES.2008.4577674

M. Khalgui, H. Hanisch

引用次数: 6

Performance evaluation of a java chip-multiprocessor 一个java芯片多处理器的性能评估

2008 International Symposium on Industrial Embedded Systems Pub Date : 2008-06-11 DOI: 10.1109/SIES.2008.4577678

Christof Pitter, Martin Schoeberl

{"title":"Performance evaluation of a java chip-multiprocessor","authors":"Christof Pitter, Martin Schoeberl","doi":"10.1109/SIES.2008.4577678","DOIUrl":"https://doi.org/10.1109/SIES.2008.4577678","url":null,"abstract":"Chip multiprocessing design is an emerging trend for embedded systems. In this paper, we introduce a Java multiprocessor system-on-chip called JopCMP. It is a symmetric shared-memory multiprocessor and consists of up to 8 Java Optimized Processor (JOP) cores, an arbitration control device, and a global shared memory. All components are interconnected with a system-on-chip bus. This paper focuses on the performance evaluation of different hardware configurations of the multicore system. Therefore, we vary the instruction cache sizes, the number of processors and the memory bandwidth. Within our experiments, we measure the performance by running three benchmarks on real hardware: an embedded application from industry, a computationally intensive matrix multiplication and a synthetic benchmark that continuously accesses a shared data structure. Two different field-programmable gate arrays are used for the presented experiments. Our results illustrate the promises and limits of the proposed multiprocessor architecture concerning synchronization, memory bandwidth and caching. Furthermore, we compare the performance and size of JopCMP with a complex Java processor.","PeriodicalId":438401,"journal":{"name":"2008 International Symposium on Industrial Embedded Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131274746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 21

Integrating software agents and IEC 61499 realtime control for reconfigurable distributed manufacturing systems 集成软件代理和IEC 61499实时控制的可重构分布式制造系统

2008 International Symposium on Industrial Embedded Systems Pub Date : 2008-06-11 DOI: 10.1109/SIES.2008.4577710

I. Hegny, O. Hummer, Alois Zoitl, G. Koppensteiner, M. Merdan

引用次数: 48

Efficient implementation of eSTREAM ciphers on 8-bit AVR microcontrollers eSTREAM密码在8位AVR微控制器上的高效实现

2008 International Symposium on Industrial Embedded Systems Pub Date : 2008-06-11 DOI: 10.1109/SIES.2008.4577681

Gordon Meiser, T. Eisenbarth, Kerstin Lemke-Rust, C. Paar

{"title":"Efficient implementation of eSTREAM ciphers on 8-bit AVR microcontrollers","authors":"Gordon Meiser, T. Eisenbarth, Kerstin Lemke-Rust, C. Paar","doi":"10.1109/SIES.2008.4577681","DOIUrl":"https://doi.org/10.1109/SIES.2008.4577681","url":null,"abstract":"This work is motivated by the question of how efficient modern stream ciphers in the eSTREAM project (Profile I) can be implemented on small embedded microcontrollers that are also constrained in memory resources. In response to this question, we present the first implementation results for Dragon, HC-128, LEX, Salsa20, Salsa20/12, and Sosemanuk on 8-bit microcontrollers. These ciphers are definitively free for any use, i.e., their use is not covered by intellectual property rights. For the evaluation process, we follow a two-stage approach and compare with efficient implementations of the AES block cipher. First, the C code implementation provided by the cipherspsila designers was ported to an 8-bit AVR microcontroller and the suitability of these stream ciphers for the use in embedded systems was assessed. In the second stage we implemented Dragon, LEX, Salsa20, Salsa20/12, and Sosemanuk in assembler to tap the full potential of an embedded implementation. Our efficiency metrics are memory usage in flash and SRAM and performance of keystream generation, key setup, and IV setup. Regarding encryption speed, all stream ciphers except for Salsa20 turned out to outperform AES. In terms of memory needs, Salsa20, Salsa20/12, and LEX are almost as compact as AES. In view of the final eSTREAM portfolio (Profile I), Salsa20/12 is the only promising alternative for the AES cipher on memory constrained 8-bit embedded microcontrollers. For embedded applications with high throughput requirements, Sosemanuk is the most suitable cipher if its considerable higher memory needs can be tolerated.","PeriodicalId":438401,"journal":{"name":"2008 International Symposium on Industrial Embedded Systems","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115334480","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 52

Inter-task WCET computation for a-way instruction caches 单向指令缓存的任务间WCET计算

2008 International Symposium on Industrial Embedded Systems Pub Date : 2008-06-11 DOI: 10.1109/SIES.2008.4577696

Fadia Nemer, H. Cassé, P. Sainrat, J. Bahsoun

引用次数: 11

A model-driven validation & verification environment for embedded systems 用于嵌入式系统的模型驱动验证和验证环境

2008 International Symposium on Industrial Embedded Systems Pub Date : 2008-06-11 DOI: 10.1109/SIES.2008.4577708

A. Gargantini, E. Riccobene, P. Scandurra

引用次数: 8