2017 IEEE Asian Solid-State Circuits Conference (A-SSCC)最新文献

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A DVS-based burst mode with automatic entrance point control technique in DC-DC boost converter for wearable devices and IoT applications 用于可穿戴设备和物联网应用的DC-DC升压转换器中基于dvs的突发模式和自动入口点控制技术

2017 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 1900-01-01 DOI: 10.1109/ASSCC.2017.8240231

Chiao-Hung Cheng, L. Lin, Jian-He Lin, Ke-Horng Chen, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai

{"title":"A DVS-based burst mode with automatic entrance point control technique in DC-DC boost converter for wearable devices and IoT applications","authors":"Chiao-Hung Cheng, L. Lin, Jian-He Lin, Ke-Horng Chen, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai","doi":"10.1109/ASSCC.2017.8240231","DOIUrl":"https://doi.org/10.1109/ASSCC.2017.8240231","url":null,"abstract":"The proposed dynamic voltage scaling (DVS) based burst mode links the DVS technique in a system on a chip (SoC) and the burst mode operation of the DC-DC converter for further efficiency improving. Conventional burst mode has only one entrance transition point (ETP) between the pulse width modulation (PWM) and the burst mode, so the voltage ripple is high at low DVS voltage while the efficiency is low at high DVS voltage. The proposed DVS-based burst mode uses the automatic entrance point control (AEPC) technique to decide multiple ETP values corresponding to the voltage identification (VID) code from the SoC. The quality enhancement technique deliberately adjusts the burst reference voltage to further reduce the output ripple with acceptable loss of efficiency. The tested DC-DC boost converter with the DVS-based burst mode technique is fabricated in 0.18μm CMOS process. Measurement results show that the efficiency is higher than 85% when the output voltage varies from 1.8V to 3.2V (controlled by the DVS) and load current ranges from 0.1mA to 140mA, with peak efficiency 94%.","PeriodicalId":438242,"journal":{"name":"2017 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123418479","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

A high efficiency and fast transient digital low-dropout assisted switched-capacitor converter for EMI-free Internet of Everything (IoE) systems 一种用于无emi万物互联(IoE)系统的高效快速瞬态数字低差辅助开关电容变换器

2017 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 1900-01-01 DOI: 10.1109/ASSCC.2017.8240233

Shao-Qi Chen, Yen-Ting Lin, Yu-Sheng Ma, Wen-Hau Yang, Ke-Horng Chen, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai

{"title":"A high efficiency and fast transient digital low-dropout assisted switched-capacitor converter for EMI-free Internet of Everything (IoE) systems","authors":"Shao-Qi Chen, Yen-Ting Lin, Yu-Sheng Ma, Wen-Hau Yang, Ke-Horng Chen, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai","doi":"10.1109/ASSCC.2017.8240233","DOIUrl":"https://doi.org/10.1109/ASSCC.2017.8240233","url":null,"abstract":"State-of-the-art closed-loop switched-capacitor (SC) designs usually regulate the output voltage by pulse frequency modulation (PFM) with the disadvantage of large electromagnetic interference (EMI). It may cause the failure of the Internet of Everything (IoE) devices. This paper proposes the hybrid digital low drop-out (DLDO) SC converter with a constant switching pulse width modulation (PWM) control for low EMI. Besides, the analog-to-digital current conversion provided by the DLDO due to its fast transient response can predict the desired ratio for the SC and reduce the dip voltage at the same time. The handshaking technique achieves smooth transition in the hybrid architecture. Experimental results show peak efficiency of 85% (closed-loop) and 95% (open loop) since the power converter has fast transient response by the DLDO prediction and reduction of switching power loss. Accurate fine tune operation by the DLDO and smooth handshaking improve load regulation from 49mV to 3mV and undershoot from 263mV to 93mV with a reduced recovery time of 200ns.","PeriodicalId":438242,"journal":{"name":"2017 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125593059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A single-inductor triple-input-triple-output (SITITO) energy harvesting interface with cycle-by-cycle source tracking and adaptive peak-inductor-current control 单电感三输入三输出(SITITO)能量收集接口，具有逐周期源跟踪和自适应峰值电感电流控制

2017 IEEE Asian Solid-State Circuits Conference (A-SSCC) Pub Date : 1900-01-01 DOI: 10.1109/ASSCC.2017.8240229

Chi-Wei Liu, Ming-Jie Chung, Hui-Hsuan Lee, Pei-Chun Liao, Po-Hung Chen

{"title":"A single-inductor triple-input-triple-output (SITITO) energy harvesting interface with cycle-by-cycle source tracking and adaptive peak-inductor-current control","authors":"Chi-Wei Liu, Ming-Jie Chung, Hui-Hsuan Lee, Pei-Chun Liao, Po-Hung Chen","doi":"10.1109/ASSCC.2017.8240229","DOIUrl":"https://doi.org/10.1109/ASSCC.2017.8240229","url":null,"abstract":"In this paper, a single-inductor triple-input-triple-output (SITITO) buck-boost converter with cycle-by-cycle source tracking (CCST) is developed for multi-source energy harvesting. The proposed CCST is capable of harvesting power from the PV and TEG simultaneously, and automatically selects the appropriate source according to the maximum power point (MPP) of the transducers in each switching cycle. The converter provides two regulated outputs for the analog (Vout1 = 1.2 V) and the digital (Vout2 = 0.4–0.6 V) circuits, while storing the excess energy in a storage capacitor (Cout3). An adaptive on-time (AOT) circuit with an adaptive peak-inductor-current (APIC) control is developed for dynamically adjusting the on-time based on the input voltage (VIN) to obtain high conversion efficiency under different VIN. The proposed converter achieves a peak efficiency of 84.4% with an available input voltage of 0.05 V to 0.8 V. Compared to the conventional constant peak-inductor-current (CPIC) control, the proposed APIC improves 11 % efficiency at low Vin.","PeriodicalId":438242,"journal":{"name":"2017 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"144 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132867959","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

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