IEEE Workshop on Signal Processing Systems Design and Implementation, 2005.最新文献_第8页

Hardware and software implementations of an MMSE equalizer for MIMO-OFDM based WLAN 基于MIMO-OFDM的无线局域网MMSE均衡器的硬件和软件实现

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579829

O. Paker, K. van Berkel, K. Moerman

引用次数: 7

Optimization of finite interval CMA implementation for FPGA 基于FPGA的有限区间CMA优化实现

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579842

A. Hermanek, J. Schier, P. Šůcha, Z. Hanzálek

引用次数: 5

An algorithmic enhancement for reducing computations of bidirectional motion estimation 一种减少双向运动估计计算的算法改进

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579949

T. Migita, V. Moshnyaga

引用次数: 2

A switched current based FPAA macrocell for mixed mode signal processing systems 一种用于混合模式信号处理系统的基于开关电流的FPAA宏单元

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579854

M. Halima, M. Fakhfakh, M. Loulou

引用次数: 4

Comparison of look-up table minimization methods for real-time power amplifier simulation 功率放大器实时仿真中查找表最小化方法的比较

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579942

Yan Zhang, A. Mammela

{"title":"Comparison of look-up table minimization methods for real-time power amplifier simulation","authors":"Yan Zhang, A. Mammela","doi":"10.1109/SIPS.2005.1579942","DOIUrl":"https://doi.org/10.1109/SIPS.2005.1579942","url":null,"abstract":"Look-up table (LUT) is one of the most popular methods for simulating the nonlinear characteristics of radio frequency (RF) power amplifiers. In this paper two practical methods for minimizing the LUT size are assessed for fast and flexible simulations using field programmable gate array (FPGA) circuits. They are cubic-spline interpolation and segmented nonuniform table indexing methods. The implementation architectures for these two approaches were developed and implemented. In addition, a suitable evaluation criterion for this kind of new applications is proposed in this paper. Implementation complexity and goodness of curve reconstruction were both considered so that the evaluation process could be more accurate and complete. The numerical comparisons show that the reconstruction performance of the cubic-spline interpolation method outperforms the nonuniform table indexing method dramatically by the sacrifice of a number of multipliers and double memory resources. The results also show that different segmentation schemes can considerably affect the performance of the segmented nonuniform indexing method.","PeriodicalId":436123,"journal":{"name":"IEEE Workshop on Signal Processing Systems Design and Implementation, 2005.","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130908901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Watermarking strategies for RNS-based system intellectual property protection 基于rns的系统知识产权保护的水印策略

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579857

E. Castillo, L. Parrilla, A. García, A. Lloris, U. Meyer-Baese

引用次数: 2

Energy detection UWB receiver design using a multi-resolution VHDL-AMS description 能量检测UWB接收机设计采用多分辨率VHDL-AMS描述

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579831

M. Crepaldi, M. Casu, M. Graziano

引用次数: 18

A multi-carrier echo canceller based on symmetric decomposition 一种基于对称分解的多载波回波消除器

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579871

F. Pisoni, Marco Bonaventura

引用次数: 4

Parallel interference cancellation for DS/CDMA downlink with low spreading factors 低扩频的DS/CDMA下行并行干扰消除

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579955

I. Krikidis

{"title":"Parallel interference cancellation for DS/CDMA downlink with low spreading factors","authors":"I. Krikidis","doi":"10.1109/SIPS.2005.1579955","DOIUrl":"https://doi.org/10.1109/SIPS.2005.1579955","url":null,"abstract":"Parallel interference cancellation (PIC) refers to a family of low-complexity multi-user detection methods for the uplink of direct-sequence code-division multiple-access (DS/CDMA) systems. Recently, it has been viable for the downlink and terminal implementations. The PIC schemes using as \"infected\" signal the correlation input have a simpler structure, but perform poorly when the spreading factor (SF) is low. In this paper we propose a new PIC scheme which, besides multiple access interference (MAI) suppression to the correlation input performs also inter-path interference (IPI) mitigation to the correlation output. Numerical results for a downlink DS/CDMA system show that the proposed multistage detector optimizes jointly performance and computational power. It approximates the performance of a conventional PIC, suppressing the interference to the correlation output, but it has lower computational complexity. In the same time, the computational similarities and the iterative nature of the different sub-algorithms of the proposed PIC scheme make possible the design of a simple reconfigurable architecture which minimizes the area overhead and the power consumption. These properties are suitable for terminal implementations where the computational power is more critical than for the base stations (BSs).","PeriodicalId":436123,"journal":{"name":"IEEE Workshop on Signal Processing Systems Design and Implementation, 2005.","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125295359","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Hardware design for end-to-end modular exponentiation in redundant number representation 冗余数表示中端到端模块化求幂的硬件设计

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579840

M. O. Sanu, E. Swartzlander

引用次数: 0