Proceedings of the 16th ACM International Conference on Computing Frontiers最新文献_第6页

Scaling up performance of fat nodes for HPC 提高高性能计算中脂肪节点的性能

Proceedings of the 16th ACM International Conference on Computing Frontiers Pub Date : 2019-04-30 DOI: 10.1145/3310273.3325137

Alejandro Rico

引用次数: 0

Spatially fine-grained air quality prediction based on DBU-LSTM 基于DBU-LSTM的空间细粒度空气质量预测

Proceedings of the 16th ACM International Conference on Computing Frontiers Pub Date : 2019-04-30 DOI: 10.1145/3310273.3322829

Liang Ge, Aoli Zhou, Hang Li, Junling Liu

引用次数: 5

Approximate loop unrolling 近似循环展开

Proceedings of the 16th ACM International Conference on Computing Frontiers Pub Date : 2019-04-30 DOI: 10.1145/3310273.3323841

M. Rodriguez-Cancio, B. Combemale, B. Baudry

引用次数: 4

CacheGuard: a security-enhanced directory architecture against continuous attacks CacheGuard:针对持续攻击的安全增强的目录架构

Proceedings of the 16th ACM International Conference on Computing Frontiers Pub Date : 2019-04-30 DOI: 10.1145/3310273.3323051

Kai Wang, Fengkai Yuan, Rui Hou, Jingqiang Lin, Z. Ji, Dan Meng

{"title":"CacheGuard: a security-enhanced directory architecture against continuous attacks","authors":"Kai Wang, Fengkai Yuan, Rui Hou, Jingqiang Lin, Z. Ji, Dan Meng","doi":"10.1145/3310273.3323051","DOIUrl":"https://doi.org/10.1145/3310273.3323051","url":null,"abstract":"Modern processor cores share the last-level cache and directory to improve resource utilization. Unfortunately, such sharing makes the cache vulnerable to cross-core cache side channel attacks. Recent studies show that information leakage through cross-core cache side channel attacks is a serious threat in different computing domains ranging from cloud servers and mobile phones to embedded devices. However, previous solutions have limitations of losing performance, lacking golden standards, requiring software support, or being easily bypassed. In this paper, we observe that most cross-core cache side channel attacks cause sensitive data to appear in a ping-pong pattern in continuous attack scenarios, where attackers need to launch numerous attacks in a short period of time. This paper proposes CacheGuard to defend against the continuous attacks. CacheGuard extends the directory architecture for capturing the ping-pong patterns. Once the ping-pong pattern of a cache line is captured, Cache-Guard can secure the line with two pattern-oriented counteractions, Preload and Lock. The experimental evaluation demonstrates that CacheGuard can block the continuous attacks, and that it induces negligible performance degradation and hardware overhead.","PeriodicalId":431860,"journal":{"name":"Proceedings of the 16th ACM International Conference on Computing Frontiers","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131423282","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

User-centered context-aware CPU/GPU power management for interactive applications on smartphones 以用户为中心的上下文感知CPU/GPU电源管理在智能手机上的交互式应用程序

Proceedings of the 16th ACM International Conference on Computing Frontiers Pub Date : 2019-04-30 DOI: 10.1145/3310273.3322825

Syuan-Yi Lin, C. King

引用次数: 4

Performance statistics and learning based detection of exploitative speculative attacks 性能统计和基于学习的利用投机攻击检测

Proceedings of the 16th ACM International Conference on Computing Frontiers Pub Date : 2019-04-30 DOI: 10.1145/3310273.3322832

Swastika Dutta, S. Sinha

引用次数: 2

Accelerating parallel graph computing with speculation 利用推测加速并行图计算

Proceedings of the 16th ACM International Conference on Computing Frontiers Pub Date : 2019-04-30 DOI: 10.1145/3310273.3323049

Shuo Ji, Yinliang Zhao, Qing Yi

引用次数: 1

Analysing the tor web with high performance graph algorithms 用高性能图算法分析web

Proceedings of the 16th ACM International Conference on Computing Frontiers Pub Date : 2019-04-30 DOI: 10.1145/3310273.3323918

M. Bernaschi, Alessandro Celestini, Stefano Guarino, F. Lombardi, Enrico Mastrostefano

{"title":"Analysing the tor web with high performance graph algorithms","authors":"M. Bernaschi, Alessandro Celestini, Stefano Guarino, F. Lombardi, Enrico Mastrostefano","doi":"10.1145/3310273.3323918","DOIUrl":"https://doi.org/10.1145/3310273.3323918","url":null,"abstract":"The exploration and analysis of Web graphs has flourished in the recent past, producing a large number of relevant and interesting research results. However, the unique characteristics of the Tor network demand for specific algorithms to explore and analyze it. Tor is an anonymity network that allows offering and accessing various Internet resources while guaranteeing a high degree of provider and user anonymity. So far the attention of the research community has focused on assessing the security of the Tor infrastructure. Most research work on the Tor network aimed at discovering protocol vulnerabilities to de-anonymize users and services, while little or no information is available about the topology of the Tor Web graph or the relationship between pages' content and topological structure. With our work we aim at addressing such lack of information. We describe the topology of the Tor Web graph measuring both global and local properties by means of well-known metrics that require due to the size of the network, high performance algorithms. We consider three different snapshots obtained by extensively crawling Tor three times over a 5 months time frame. Finally we present a correlation analysis of pages' semantics and topology, discussing novel insights about the Tor Web organization and its content. Our findings show that the Tor graph presents some of the characteristics of social and surface web graphs, along with a few unique peculiarities.","PeriodicalId":431860,"journal":{"name":"Proceedings of the 16th ACM International Conference on Computing Frontiers","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114424502","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

An adaptive concurrent priority queue for NUMA architectures NUMA体系结构的自适应并发优先级队列

Proceedings of the 16th ACM International Conference on Computing Frontiers Pub Date : 2019-04-30 DOI: 10.1145/3310273.3323164

F. Strati, Christina Giannoula, Dimitrios Siakavaras, G. Goumas, N. Koziris

{"title":"An adaptive concurrent priority queue for NUMA architectures","authors":"F. Strati, Christina Giannoula, Dimitrios Siakavaras, G. Goumas, N. Koziris","doi":"10.1145/3310273.3323164","DOIUrl":"https://doi.org/10.1145/3310273.3323164","url":null,"abstract":"Designing scalable concurrent priority queues for contemporary NUMA servers is challenging. Several NUMA-unaware implementations can scale up to a high number of threads exploiting the potential parallelism of the insert operations. In contrast, in deleteMin-dominated workloads, threads compete for accessing the same memory locations, i.e. the first item in the priority queue. In such cases, NUMA-aware implementations are typically used, since they reduce the coherence traffic between the nodes of a NUMA system. In this work, we propose an adaptive priority queue, called SmartPQ, that tunes itself by automatically switching between NUMA-unaware and NUMA-aware algorithmic modes to provide the highest available performance under all workloads. SmartPQ is built on top of NUMA Node Delegation (Nuddle), a low overhead technique to construct NUMA-aware data structures using any arbitrary NUMA-unaware implementation as its backbone. Moreover, SmartPQ employs machine learning to decide when to switch between its two algorithmic modes. As our evaluation reveals, it achieves the highest available performance with 88% success rate and dynamically adapts between a NUMA-aware and a NUMA-unaware mode, without overheads, while performing up to 1.83 times better performance than Spraylist, the state-of-the-art NUMA-unaware priority queue.","PeriodicalId":431860,"journal":{"name":"Proceedings of the 16th ACM International Conference on Computing Frontiers","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128087334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Designing a secure DRAM+NVM hybrid memory module 设计安全的 DRAM+NVM 混合内存模块

Proceedings of the 16th ACM International Conference on Computing Frontiers Pub Date : 2019-04-30 DOI: 10.1145/3310273.3323069

Xu Wang, I. Koren

引用次数: 0